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參數(shù)資料
| 型號： | 6PAIC3106IRGZRQ1 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 16/103頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AUDIO CODEC STEREO 48-QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 立體聲音頻 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 2 / 2 |
| 三角積分調(diào)變： | 是 |
| S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： | 92 / 102（差分），92 / 95（單端） |
| 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 91 / 99（差分），91 / 92（單端） |
| 電壓 - 電源，模擬： | 2.7 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 1.1 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-VQFN 裸露焊盤（7x7） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1077 (CN2011-ZH PDF) |
| 其它名稱： | 296-25253-6 |
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SLAS663B – AUGUST 2009 – REVISED OCTOBER 2012
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering
in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-
kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by
programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level microphone
inputs. The TLV320AIC3106 provides an extremely high range of programmability for both attack (8 ms to 1408
ms) and for decay (0.05 s to 22.4 s). This extended AGC range allows the AGC to be tuned for many types of
applications.
For battery saving applications where neither analog nor digital signal processing are required, the device can be
put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of
the device is powered down during this pass through operation.
The serial control bus supports SPI or I2C protocols, while the serial audio data bus is programmable for I2S,
left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and
support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with
special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system
clocks.
The TLV320AIC3106 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.65 V to 1.95 V,
and a digital I/O supply of 1.1 V to 3.6 V. The device is available in the 7-mm × 7-mm, 48-lead QFN (RGZ)
package.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–40°C to 85°C
QFN – RGZ
Reel of 2500
6PAIC3106IRGZRQ1
AC3106Q1
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2
Copyright 2009–2012, Texas Instruments Incorporated
Product Folder Links: TLV320AIC3106-Q1
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