參數(shù)資料
型號(hào): 68HRC05J5A
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁數(shù): 78/106頁
文件大?。?/td> 1069K
代理商: 68HRC05J5A
GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
10-10
INSTRUCTION SET
MC68HC05J5A
REV 2.1
BSET n opr
Set Bit n
Mn
1
— — — — —
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
10
12
14
16
18
1A
1C
1E
dd
dd
dd
dd
dd
dd
dd
dd
5
5
5
5
5
5
5
5
BSR rel
Branch to
Subroutine
PC
(PC) + 2; push (PCL)
SP
(SP) – 1; push (PCH)
SP
(SP) – 1
PC
(PC) + rel
C
0
I
0
M
$00
A
$00
X
$00
M
$00
M
$00
— — — — —
REL
AD
rr
6
CLC
CLI
CLR opr
CLRA
CLRX
CLR oprX
CLR ,X
CMP #opr
CMP opr
CMP opr
CMP oprX
CMP oprX
CMP ,X
COM opr
COMA
COMX
COM oprX
COM ,X
CPX #opr
CPX opr
CPX opr
CPX oprX
CPX oprX
CPX ,X
DEC opr
DECA
DECX
DEC oprX
DEC ,X
EOR #opr
EOR opr
EOR opr
EOR oprX
EOR oprX
EOR ,X
Clear Carry Bit
Clear Interrupt Mask
— — — — 0
— 0 — — —
INH
INH
DIR
INH
INH
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
DIR
INH
INH
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
DIR
INH
INH
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
98
9A
3F
4F
5F
6F
7F
A1
B1
C1
D1
E1
F1
33
43
53
63
73
A3
B3
C3
D3
E3
F3
3A
4A
5A
6A
7A
A8
B8
C8
D8
E8
F8
2
2
5
3
3
6
5
2
3
4
5
4
3
5
3
3
6
5
2
3
4
5
4
3
5
3
3
6
5
2
3
4
5
4
3
Clear Byte
— — 0 1 —
dd
ff
Compare
Accumulator with
Memory Byte
(A) – (M)
— —
¤
¤
¤
ii
dd
hh ll
ee ff
ff
Complement Byte
(One’s Complement)
M
( ) = $FF – (M)
A
(A
X
( ) = $FF – (M)
M
( ) = $FF – (M)
M
(M
— —
¤
¤
1
dd
ff
Compare Index
Register with
Memory Byte
(X) – (M)
— —
¤
¤
¤
ii
dd
hh ll
ee ff
ff
Decrement Byte
M
(M) – 1
A
(A) – 1
X
(X) – 1
M
(M) – 1
M
(M) – 1
— —
¤
¤
dd
ff
EXCLUSIVE OR
Accumulator with
Memory Byte
A
(A)
(M)
— —
¤
¤
ii
dd
hh ll
ee ff
ff
Table 10-6. Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
H I N Z C
X
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