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參數(shù)資料
| 型號(hào)： | 5891 |
| 英文描述： | BIMOS II 8-BIT SERIAL-INPUT. LATCHED SOURCE DRIVERS |
| 中文描述： | BIMOS II 8位串行輸入。鎖存源極驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 150K |
| 代理商： | 5891 |
5890
AND
5891
8-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
www.allegromicro.com
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 80 V (UCN5890A/LW) or 50 V
(UCN5891A/LW), V
DD
= 5 V and 12 V (unless otherwise noted).
Limits
Max.
Characteristic
Symbol
V
BB
Max.
Test Conditions
Min.
Units
Output Leakage Current
I
CEX
T
A
= +25
°
C
T
A
= +70
°
C
I
OUT
= -100 mA
I
OUT
= -225 mA
I
OUT
= -350 mA
I
OUT
= -350 mA, L = 2 mH, UCN5891A/LW
I
OUT
= -350 mA, L = 2 mH, UCN5890A/LW
V
DD
= 5.0 V
V
DD
= 12 V
V
DD
= 5 V to 12 V
V
DD
= V
IN
= 5.0 V
V
DD
= V
IN
= 12 V
V
DD
= 5.0 V
V
DD
= 12 V
—
-50
μ
A
μ
A
—
-100
Output Saturation Voltage
V
CE(SAT)
50 V
—
1.8
V
—
1.9
V
—
2.0
V
Output Sustaining Voltage
V
CE(sus)
Max.
35
—
V
50
—
V
Input Voltage
V
IN(1)
50 V
3.5
5.3
V
10.5
12.3
V
V
IN(0)
I
IN(1)
50 V
-0.3
+0.8
V
Input Current
50 V
—
50
μ
A
μ
A
k
k
—
240
Input lmpedance
Z
IN
50 V
100
—
50
—
Max. Clock Frequency
f
c
50 V
3.3*
—
MHz
Serial Data Output
Resistance
R
OUT
50 V
V
DD
= 5.0 V
V
DD
= 12 V
Output Enable to Output, I
OUT
= -350 mA
Output Enable to Output, I
OUT
= -350 mA
All outputs on, All outputs open
—
20
k
k
μ
s
μ
s
—
6.0
Turn-On Delay
t
PLH
t
PHL
I
BB
50 V
—
2.0
Turn-Off Delay
50 V
—
10
Supply Current
50 V
—
10
mA
All outputs off
—
200
μ
A
μ
A
μ
A
l
DD
50 V
V
DD
= 5 V, All outputs off, Inputs = 0 V
V
DD
= 12 V, All outputs off, Inputs = 0 V
V
DD
= 5 V, One output on, All Inputs = 0 V
V
DD
= 12 V, One output on, All Inputs = 0 V
T
A
= +25
°
C
T
A
= +70
°
C
I
F
= 350 mA
—
100
—
200
—
1.0
mA
—
3.0
mA
Diode Leakage Current
I
R
Max.
—
50
μ
A
μ
A
—
100
Diode Forward Voltage
V
F
Open
—
2.0
V
NOTES: Turn-off delay is influenced by load conditions. Systems applications well below the specified output loading may require
timing considerations for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem
pole configuration.
Positive (negative) current is defined as going into (coming out of) the specified device pin.
* Operation at a clock frequency greater than the specified minimum value is possible but not warranteed.
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