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Optimization Techniques Implemented
Motorola
About g56k
4-17
4.10.2 Run-time Stack Checks
If the programmer does not use malloc, calloc or realloc there is no automatic run-time
collision check. A tool is provided to allow the programmer to check the code during
debugging to see if a stack collision is likely to occur when the code is executing
normally. By selecting the
-mstack-check
option on the command-line, the compiler is
instructed to generate extra code to watch the stack and heap and detect when the run-time
stack is about to collide with the heap. This may be important when writing code for
embedded applications. When/if a stack collision occurs, the execution device, such as
RUN56, will report that the collision occurred.
Note:
All run-time libraries provided have been compiled/assembled without the stack
checking option. Thus it is possible to have a run-time stack/heap collision
during execution of library routines.
4.11 Optimization Techniques Implemented
This section provides a brief overview of the optimization techniques currently
implemented by DSP56KCC. DSP56KCC implements most machine-independent C
language optimization techniques as well as machine-specific optimizations. By default,
the control program G56k enables all levels of optimization (see Chapter 3, “Control
Program Options.” )
4.11.1 Register Promotion and Lifetime Analysis
The compiler automatically identifies all variables that are candidates for promotion to the
register storage class. Using standard data flow techniques, lifetime analysis is performed
to determine the best variables for promotion. When variable lifetimes do not overlap,
more than one variable may be promoted to a single register.
4.11.2 Common Sub-expression Elimination
A Common Sub-Expression, or CSE, is created when two or more statements compute the
same value. When CSEs are detected during data flow analysis, the compiler eliminates all
but one of the computations and propagates the result. A classic example of a CSE is the
array element assignment from another array,
array_1[index + 1] = array_2[index + 1];
where the expression “index + 1” is the CSE.
This optimization is especially effective as CSEs become candidates for register
promotion.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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