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Memory Configuration and Management
Motorola
Software-Hardware Integration
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6-3
Note:
Labels which begin with a double underline (e.g., _ _crt0_end) in this manual
have a space between the double underlines to visually separate them. Do not
separate the leading double underlines with a space when coding them (i.e.,
code _ _crt0_end as __crt0_end).
Example 6-1. DSP56000/DSP56001 Operation Mode Change
Mode 2 has a reset vector of $E000 which must contain a jmp to the C program bootstrap
code. Adding the following code segment to the crt0 file will change the bootstrap mode
to Mode2.
section mode2_reset
org p:$e000
jmp F_ _start; jump to the C start-up program.
endsec
Example 6-2. C Bootstrap Code Location Change
Hardware was designed to have a 256 byte ROM monitor located in the program memory
space starting at $0000 and ending at $FF. Program RAM starts at location p:$100. The
following changes to the
crt0
file will change the beginning location of the C bootstrap
code to the first available RAM location (p:$100). The DS statement allocates program
space starting at p:$0000 and lets the ROM be located at address p:$0000. The org
statement places the C bootstrap code at memory location p:$100.
Change this portion of the crt0 file:
org
p:
F_ _start
to:
org p:$0000
ds $100
org p:$100
F_ _start
6.5 Memory Configuration and Management
The DSP56000 family supports three memory spaces: program memory (p memory), x
and y data memories. The DSP56000 family design philosophy is to support concurrent
access to these memory spaces to accelerate DSP operations. The C programming
language does not support separate memory spaces but instead treats memory as a single
memory space. As a result, there is a difference between hardware memory organization
and C memory utilization.
F
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