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參數(shù)資料
| 型號(hào)： | 55VDMOSFULL-BRIDGEMOTORDRIVER |
| 英文描述： | (647.67 k) |
| 中文描述： | （647.67十一） |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 647K |
| 代理商： | 55VDMOSFULL-BRIDGEMOTORDRIVER |
Electrical Characteristics
(Note 2) (Continued)
The following specifications apply for V
CC
= +42V, unless otherwise stated.
Boldface limits apply over the operating tem-
perature range, 40C
≤
T
J
≤
+125C.
A
= T
J
= 25C.
Symbol
Parameter
Conditions
Typical
(Note 5)
Limit
(Note 5)
Units
(Limits)
DIGITAL-TO-ANALOG CONVERTER (DAC)
Resolution
Monotonicity
Total Unadjusted Error
4
4
Bits (min)
Bits (min)
LSB (max)
LSB (max)
ns
μA
μA (max)
0.125
0.25
0.5
Propagation Delay
DAC REF Input Current
50
0.5
I
REF
DAC REF = +5V
±
10
COMPARATOR AND MONOSTABLE
Comparator High Output Level
Comparator Low Output Level
Comparator Output Current
Source
Sink
t
DELAY
Monostable Turn OFF Delay
6.27
88
V
mV
0.2
3.2
1.2
mA
mA
μs
(Note 8)
2.0
μs (max)
PROTECTION AND PACKAGE THERMAL RESISTANCES
Undervoltage Lockout, V
CC
5
8
V (min)
V (max)
C
T
JSD
Shutdown Temperature, T
J
Package Thermal Resistances
Junction-to-Case, TO-220
Junction-to-Ambient, TO-220
LOGIC INPUTS
V
IL
Low Level Input Voltage
155
θ
JC
θ
JA
1.5
35
C/W
C/W
0.1
0.8
2
12
±
10
V (min)
V (max)
V (min)
V (max)
μA (max)
V
IH
High Level Input Voltage
I
IN
Input Current
V
IN
= 0V or 12V
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
outside the rated Operating Conditions.
Note 2:
Unless otherwise stated, load currents are pulses with widths less than 2 ms and duty cycles less than 5%.
Note 3:
The maximum allowable power dissipation at any ambient temperature is P
= (125 T
)/
θ
, where 125C is the maximum junction temperature for op-
eration, T
A
is the ambient temperature in C, and
θ
JA
is the junction-to-ambient thermal resistance in C/W. Exceeding P
max
voids the Electrical Specifications by forc-
ing T
above 125C. If the junction temperature exceeds 155C, internal circuitry disables the power bridge. When a heatsink is used,
θ
JA
is the sum of the
junction-to-case thermal resistance of the package,
θ
JC
, and the case-to-ambient thermal resistance of the heatsink.
Note 4:
ESD rating is based on the human body model of 100 pF discharged through a 1.5 k
resistor. M1, M2, M3 and M4, pins 8, 7, 6 and 4 are protected to 800V.
Note 5:
All limits are 100% production tested at 25C. Temperature extreme limits are guaranteed via correlation using accepted SQC (Statistical Quality Control)
methods. All limits are used to calculate AOQL (Average Outgoing Quality Level). Typicals are at T
J
= 25C and represent the most likely parametric norm.
Note 6:
Asymmetric turn OFF and ON delay times and switching times ensure a switch turns OFF before the other switch in the same half H-bridge begins to turn
ON (preventing momentary short circuits between the power supply and ground). The transitional period during which both switches are OFF is commonly referred
to as the dead band.
Note 7:
(I
LOAD
, I
SENSE
) data points are taken for load currents of 0.5A, 1A, 2A and 3A. The current sense gain is specified as I
SENSE
/I
LOAD
for the 1A data point.
The current sense linearity is specified as the slope of the line between the 0.5A and 1A data points minus the slope of the line between the 2A and 3A data points
all divided by the slope of the line between the 0.5A and 1A data points.
Note 8:
Turn OFF delay, t
, is defined as the time from the voltage at the output of the current sense amplifier reaching the DAC output voltage to the lower
DMOS switch beginning to turn OFF. With V
= 32V, DIRECTION high, and 200
connected between OUT1 and V
, the voltage at RC is increased from 0V to
5V at 1.2V/μs, and t
DELAY
is measured as the time from the voltage at RC reaching 2V to the time the voltage at OUT 1 reaches 3V.
3
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