參數(shù)資料
型號(hào)： 4250
英文描述： Low-Cost, 2.7V to 5.5V Temperature Switches in a SOT23
中文描述： 4250組數(shù)據(jù)表數(shù)據(jù)表652K/NOV.30.97
文件頁(yè)數(shù)： 52/59頁(yè)
文件大?。?/td> 652K
代理商： 4250
51
MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply voltage
Input voltage X
IN
, G
0
–G
3
, D
2
/C, D
3
/K
Input voltage F
0
, F
1
, S
0
–S
3
, D
0
, D
1
, RESET
Output voltage X
OUT
Output voltage F
0
, F
1
, S
0
–S
3
, D
0
, D
1
Output voltage G
0
–G
3
, D
2
/C, D
3
/K
Power dissipation
Operating temperature range
Storage temperature range
Conditions
Output transistors
in cut-off state
Ta = 25
°
C
Unit
V
V
V
V
V
V
mW
°
C
°
C
Ratings
–0.3 to 7.0
–0.3 to V
DD
+0.3
–0.3 to 8.0
–0.3 to V
DD
+0.3
–0.3 to 8.0
–0.3 to V
DD
+0.3
300
–20 to 85
–40 to 125
Symbol
V
DD
V
I
V
I
V
O
V
O
V
O
P
d
T
opr
T
stg
RECOMMENDED OPERATING CONDITIONS
(Ta = –20
°
C to 85
°
C, V
DD
= 2.2 V to 5.5 V, unless otherwise noted)
Parameter
Supply voltage
RAM back-up voltage (at RAM back-up mode)
Supply voltage
“H” level input voltage F
0
, F
1
, D
0
, D
1
“H” level input voltage G
0
–G
3
, D
2
, D
3
“H” level input voltage INT
“H” level input voltage C, K
“H” level input voltage S
0
–S
3
“H” level input voltage
RESET
“L” level input voltage C, K
“L” level input voltage S
0
–S
3
“L” level input voltage F
0
, F
1
, G
0
–G
3
, D
0
–D
3
“L” level input voltage INT
“L” level input voltage
RESET
“L” level peak output current
F
0
, F
1
, S
0
–S
3
, D
0
, D
1
, D
2
/C, D
3
/K
“L” level peak output current G
0
, G
1
/T
OUT
, G
2
, G
3
“L” level average output current
F
0
, F
1
, S
0
–S
3
, D
0
, D
1
, D
2
/C, D
3
/K
“L” level average output current G
0
, G
1
/T
OUT
, G
2
, G
3
System clock frequency (Note 2)
Frequency error (errors of external capacitor and resistor
not included)
Note: Use the 30 pF capacitor externally and enable the
change of frequency by external resistor.
Limits
Typ.
5.0
Conditions
0.4 MHz
≤
f(X
IN
)
≤
4.4 MHz
0.4 MHz
≤
f(X
IN
)
≤
1.1 MHz
V
DD
= 4.5 V to 5.5 V
V
DD
= 2.2 V to 5.5 V
V
DD
= 4.5 V to 5.5 V
V
DD
= 2.2 V to 5.5 V
(Note 1)
(Note 1)
V
DD
= 4.5 V to 5.5 V
V
DD
= 2.2 V to 5.5 V
V
DD
= 5 V
±
10 %
Ta = 25
°
C [reference]
(–20
°
C to 85
°
C)
V
DD
= 3 V
±
10 %
Ta = 25
°
C [reference]
(–20
°
C to 85
°
C)
Max.
5.5
5.5
5.5
7
V
DD
V
DD
V
DD
V
DD
7
7
7
0.16V
DD
0.2V
DD
0.3V
DD
0.15V
DD
0.1V
DD
24
10
12
5
4.4
1.1
±
17
±
17
0
4.0
1.0
Min.
4.5
2.2
2.0
0.7V
DD
0.7V
DD
0.85V
DD
0.5V
DD
0.7V
DD
0.4V
DD
0.6V
DD
0.85V
DD
0
0
0
0
0
0.4
0.4
Symbol
V
DD
V
RAM
V
SS
V
IH
V
IH
V
IH
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
V
IL
V
IL
I
OL
(peak)
I
OL
(peak)
I
OL
(avg)
I
OL
(avg)
f(X
IN
)
f(X
IN
)
Notes 1: Keep the total currents of I
OL
(avg) for ports S
0
–S
3
, D
0
, D
1
, D
2
/C, D
3
/K to 50 mA or less.
Keep the total currents of I
OL
(avg) for ports F
0
, F
1
, G
0
, G
2
, G
3
and G
1
/T
OUT
pin to 30 mA or less.
2: The system clock frequency is affected by the external capacitor, resistor and LSI. Accordingly, set the constants so as not
to exceed the frequency limits.
Be careful about the input waveform when using the external clock. Refer to the notes on use.
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
MHz
%
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