參數(shù)資料
型號: 3197
廠商: Allegro MicroSystems, Inc.
英文描述: Protected,High-Temperature,Hall-Effect Latch With Active Pull-Down(保護型,工作于高溫,集電極開路霍爾效應(yīng)鎖存器)
中文描述: 保護,高溫,霍爾效應(yīng)與主動下拉(保護型,工作于高溫,集電極開路霍爾效應(yīng)鎖存器鎖存)
文件頁數(shù): 8/12頁
文件大?。?/td> 193K
代理商: 3197
3197
PROTECTED, HIGH-TEMP.,
OPEN-COLLECTOR
HALL-EFFECT LATCH
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Test Method and
Test Conditions
No. of
Lots
Samples
Per Lot
Qualification Test
Test Length
Comments
Biased Humidity
JESD22-A101
T
A
= 85
°
C, RH = 85%
3
1200 hrs
116
Device biased for
minimum power
High-Temperature
Operating Life
JESD22-A108
T
A
= 150
°
C, T
J
= 165
°
C
3
1200 hrs
116
Surge Operating Life
JESD22-A108
T
A
= 175
°
C, T
J
= 190
°
C
1
504 hrs
116
Pressure Cooker,
Unbiased
JESD22-A102, Method C
3
96 hrs
77
Storage Life
MIL-STD-883, Method 1008
T
A
= 170
°
C
1
1200 hrs
77
Temperature Cycle
MIL-STD-883, Method 1010
3
1000 cycles
153
ESD
Human Body Model
MIL-STD-883, Method 3015
1
Pre/Post
Reading
3 per
test
Test to failure
HBM > 16 kV
ESD
Machine Model
1
Pre/Post
Reading
3 per
test
Test to failure
MM > 800 V
Output Overloads.
Current through the output transis-
tor is sensed with a low-value on-chip aluminum resistor.
The voltage drop across this resistor is fed back to control
the base drive of the output stage. This feedback prevents
the output transistor from exceeding its maximum current
density rating by limiting the output current to between
35 mA and 70 mA. Under short-circuit conditions, the
device will dissipate an increased amount of power (P
D
=
V
OUT
x I
LIMIT
) and the output transistor will be thermally
stressed.
Thermal Stress.
When thermal stresses (either internal
or external) cause the junction temperature to exceed
+165
°
C, thermal shutdown of the output transistor is
activated. The thermal shutdown circuitry only provides
protection against thermal stresses caused by increased
power dissipation of the output transistor.
Overvoltage.
The device protects itself against high-
voltage transients by shutting OFF all supply-referenced
active components, reducing the supply current, and
minimizing device power dissipation. Overvoltage
shutdown can occur anywhere between 28 V and 55 V and
device operation above 28 V cannot be recommended.
Under a sustained overvoltage, the device may be required
to dissipate an increased amount of power (P
D
= V
CC
x
I
CC
) and the device may be thermally stressed (see above).
Output Voltage.
The output is clamped with an on-chip
Zener diode to limit the maximum output voltage that can
occur during overvoltage faults or when switching an
inductive load.
When any fault condition is removed, the device returns to
normal operating mode.
CRITERIA FOR DEVICE QUALIFICATION
All Allegro sensors are subjected to stringent qualification requirements prior to being released to production. To
become qualified, except for the destructive ESD tests, no failures are permitted.
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