
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(t
AVQV
) isequaltothedelayfromEtooutput(t
ELQV
).
Datais available attheoutputafter adelay oft
GLQV
from the falling edge of G, assuming that E has
been low and the addresseshave been stable for
at least t
AVQV
-t
GLQV
.
Standby Mode
The M27C64Ahas astandby mode whichreduces
the active current from 30mA to 100
μ
A. The
M27C64Ais placedin the standbymode by apply-
ingaCMOS highsignal totheEinput. When inthe
standbymode, theoutputsareinahighimpedance
state, independentof the G input.
Two Line Output Control
BecauseEPROMsareusuallyused inlargermem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection.The two line control function
allows:
a. the lowestpossible memory power dissipation,
b. completeassurancethat output bus contention
will not occur.
For themostefficientuse ofthesetwocontrollines,
E should be decoded and used as the primary
device selecting function,while G shouldbe made
a common connection to all devices in the array
and connected to the READ line from the system
control bus.Thisensuresthatall deselectedmem-
ory devices are in their low power standby mode
and that the outputpins are only active when data
is required from a particular memory device.
SystemConsiderations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
CC
, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitudeof
the transient current peaks is dependent on the
capacitiveandinductiveloadingof thedeviceatthe
output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1
μ
F ceramic
capacitor be used on every device between V
CC
andV
SS
. Thisshouldbea highfrequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7
μ
F bulk electrolytic capacitor should be used
betweenV
CC
and V
SS
forevery eight devices. The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitoris to overcomethe voltage drop caused
by the inductive effects of PCB traces.
Mode
E
G
P
A9
V
PP
Q0 - Q7
Read
V
IL
V
IL
V
IH
X
V
CC
Data Out
Output Disable
V
IL
V
IH
V
IH
X
V
CC
Hi-Z
Program
V
IL
V
IH
V
IL
Pulse
X
V
PP
Data In
Verify
V
IL
V
IL
V
IH
X
V
PP
Data Out
Program Inhibit
V
IH
X
X
X
V
PP
Hi-Z
Standby
V
IH
X
X
X
V
CC
Hi-Z
Electronic Signature
V
IL
V
IL
V
IH
V
ID
V
CC
Codes
Note
: X = V
IH
or V
IL
, V
ID
= 12V
±
0.5V
Table 3. OperatingModes
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer’s Code
V
IL
1
0
0
1
1
0
1
1
9Bh
Device Code
V
IH
0
0
0
0
1
0
0
0
08h
Table 4. Electronic Signature
3/11
M27C64A