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| 型號： | 21728 |
| 英文描述： | 4-Bit, Dual, Programmable Delay Line |
| 中文描述： | 接口的Am188EM的DSLAC？ / QSLAC？使用小型工業(yè)應用筆記？ 84.0KB（PDF格式） |
| 文件頁數(shù)： | 3/11頁 |
| 文件大?。?/td> | 84K |
| 代理商： | 21728 |
Interfacing the Am188
TM
EM Controller to the DSLAC
TM
/QSLAC
TM
Devices Using the SSI
3
Table 1.
MPI
MPI and SSI Comparison
SOLVING THE REVERSED-BIT-ORDER
PROBLEM
The reversed-bit-order problem is not as severe as it
might seem. Generally, there are two types of data sent
over the serial interface: coefficients and bit flags.
In most cases, coefficients are generated by
AmSLAC software and stored as hex values in a
table in the microprocessor’s non-volatile storage. It
should not be difficult to rearrange the bit order prior to
placing them in the table, preventing the need for the
microprocessor to do it.
The bit flags are used to monitor or set the state of the
SLAC devices’ I/O pins in real time, but because the bit
flags are independent, the host microprocessor’s code
only needs to know where they are in the byte. Order is
not important. Bit reversal should not be significant as
it is taken into account by software.
In both cases, it should not be necessary to do bit re-
versal in the microprocessor while in use.
SOLVING THE ENABLE-POLARITY
PROBLEM
The obvious solution is to use inverters on the SDEN
outputs, but with a little bit of extra software, it is possi-
ble to do without the glue logic. Because the DSLAC
device requires two chip selects and the QSLAC de-
vice requires one chip select, if inverters are used, this
technique can only handle one DSLAC device or two
QSLAC devices. If more SLAC devices are required,
the easiest solution is to use general PIOs on the
Am188EM microcontroller to drive the chip selects of
the SLAC devices.
The alternate solution is to use the Am188EM micro-
controller’s PIO pins instead of SDEN to drive the chip
selects. As discussed above, if multiple SLAC devices
are on the bus and more than two chip selects are
needed, PIOs are required anyway. Always using PIO
pins maintains consistency and is the better solution.
Software will still need to control the DE0 and DE1 bits
as if SDEN0 and SDEN1 were used. However, be-
cause their pins are not used, they can be programmed
as PIOs and used to drive the chip selects. No pins are
wasted.
Using software to drive the SLAC devices’ chip selects
through PIOs also provides a solution for the polarity
problem and CS framing issue. Because software is
controlling the state of the PIOs directly, it is trivial to in-
vert the sense of the PIOs relative to SDEN0 or
SDEN1. Correctly controlling the chip selects further
requires that CS go high after each byte is transmitted
or received. The multiple writes and reads illustrated in
the Am186EM and Am188EM Microcontrollers
User’s Manual
in figures 11-5 and 11-6 are not allowed.
Figure 1 shows the resulting connections for a DSLAC
device. The QSLAC device is similar, but has only one
chip select.
g
Figure 1.
Interface Connections
TIMING CONSIDERATIONS
The following tables compare the timing requirements
for the worst case. For each case in the table, the worst
case is determined by looking at the most stringent re-
quirement to see if the other end of the interface can
meet the requirement. There is only one speed grade
for the DSLAC device and the QSLAC device, but there
are multiple speed grades of the Am188EM microcon-
troller, so each case has been looked at with the worst
possibility in mind.
For example, in Table 2, the date setup time for the
case where the Am188EM microcontroller is driving
Feature
Word size
Bit order
Master/Slave
Max frequency
Transmit clock edge
Receive clock edge
Clock inactive state
Synchronous
CS framed
Enable state
SSI
8
Comment
8
OK
Bit order is reversed
OK
OK
OK
OK
OK
OK
Yes, with software
CS and SDEN are the wrong polarity
MSB first
yes
4.096 MHz
falling
rising
either
yes
yes
low
LSB first
yes
uP
falling
rising
high
yes
yes and no
high
SDATA (pin 23)
SCLK (pin 26)
PIO22 (pin 25)
PIO23 (pin 24)
DIO (pin 21)
DCLK (pin 19)
CS1 (pin 32)
CS2 (pin 31)
Am188EM(tqfp)
Am79C03(plcc)
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