and it is not referenced to ana" />
參數(shù)資料
型號(hào)： 20-101-1105
廠商： Rabbit Semiconductor
文件頁數(shù)： 51/112頁
文件大?。?/td> 0K
描述： MODULE RCM4100 RABBITCORE
標(biāo)準(zhǔn)包裝： 1
系列： RabbitCore®
模塊/板類型： MPU 核心模塊
適用于相關(guān)產(chǎn)品： RCM4100
其它名稱： 316-1121
User’s Manual
39
If a device such as a battery is
connected across two channels
for a differential measurement,
and it is not referenced to
analog ground, then the current
from the device will flow
through both sets of attenuator
resistors without flowing back
to analog ground as shown in
Figure 10. This will generate a
negative voltage at one of the
inputs, LN1, which will almost
certainly lead to inaccurate A/D
conversions. To make such differential measurements, connect the R1 resistors to the A/D
converter’s internal reference voltage, which is software-configurable for 1.15 V, 2.048 V,
or 2.5 V. This internal reference voltage is available on pin 49 of header J3 as VREF, and
allows you to convert analog input voltages that are negative with respect to analog ground.
NOTE: The amplifier inside the A/D converter’s internal voltage reference circuit has a
very limited output-current capability. The internal buffer can source up to 20 mA and
sink only up to 200 A. Use a separate buffer amplifier if you need to supply any load
current.
The A/D converter’s CONVERT pin is available on pin 48 of header J3 and can be used as
a hardware means of forcing the A/D converter to start a conversion cycle at a specific time.
The CONVERT signal is an edge-triggered event and has a hold time of two CCLK periods
for debounce.
A conversion is started by an active (rising) edge on the CONVERT pin. The CONVERT
pin must stay low for at least two CCLK periods before going high for at least two CCLK
periods. Figure 11 shows the timing of a conversion start. The double falling arrow on
CCLK indicates the actual start of the conversion cycle.
Figure 11. Timing Diagram for Conversion Start Using CONVERT Pin
Appendix B.4.3 explains the implementation examples of these features on the Prototyp-
ing Board.
Figure 10. Current Flow from Ungrounded
or Floating Source
R5
R6
2.2 nF
R14
R13
2.2 nF
ADC
AIN0
AIN1
+
I
LN0
LN1
+
-
Device
CCLK
BUSY
CONV
Conversion starts
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