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參數(shù)資料
| 型號(hào)： | 1SMB36CAT3G* |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | TVS-瞬態(tài)抑制二極管 |
| 英文描述： | Watt Peak Power Zener Transient Voltage Suppressors |
| 中文描述： | 瓦峰值功率齊瞬態(tài)電壓抑制器 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 54K |
1SMB10CAT3 Series
http://onsemi.com
4
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 2
t
P
, PULSE WIDTH
1
10
100
0.1
s
1
s
10
s
100
s
1 ms
10 ms
0.1
Figure 1. Pulse Rating Curve
0
1
2
3
4
0
50
100
t, TIME (ms)
V
HALF VALUE
I
PP
2
PEAK VALUE I
PP
t
r
≤
10 s
Figure 2. Pulse Waveform
TYPICAL PROTECTION CIRCUIT
V
in
V
L
Z
in
LOAD
Figure 3. Pulse Derating Curve
P
P
°
100
80
60
40
20
0
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
°
C)
120
140
160
t
P
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50% OF I
PP
.
P
P
,
APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 4.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 5. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. The SMB series have
a very good response time, typically < 1 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Z
in
is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25
°
C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 6. Average power must be derated as the lead or
ambient temperature rises above 25
°
C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 6 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 s pulse. However, when the derating factor for a
given pulse of Figure 6 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
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