參數(shù)資料
型號: 16SP100M
廠商: National Semiconductor Corporation
英文描述: Synchronous Buck Controller with Pre-bias Startup, and Optional Clock Synchronization
中文描述: 同步降壓控制器,帶有預(yù)偏置啟動和可選時鐘同步
文件頁數(shù): 12/23頁
文件大?。?/td> 1002K
代理商: 16SP100M
Application Information
(Continued)
the Miller plateau level. This may therefore affect the choice
of the threshold voltage of the external MOSFETs, and that
in turn may depend on the chosen V
BOOT_DC
rail.
So far, in the discussion above, the forward drop across the
bootstrap diode has been ignored. But since that does affect
the output of the driver somewhat, it is a good idea to include
this drop in the following examples. Looking at the Typical
Application schematic, this means that the difference voltage
V
CC
- V
D1
, which is the voltage the bootstrap capacitor
charges up to, must always be greater than the maximum
tolerance limit of the threshold voltage of the upper MOS-
FET. Here V
D1
is the forward voltage drop across the boot-
strap diode D1. This may place restrictions on the minimum
input voltage and/or type of MOSFET used.
A basic bootstrap circuit can be built using one Schottky
diode and a small capacitor, as shown in
Figure 9
. The
capacitor C
serves to maintain enough voltage between
the top MOSFET gate and source to control the device even
when the top MOSFET is on and its source has risen up to
the input voltage level. The charge pump circuitry is fed from
V
, which can operate over a range from 3.0V to 6.0V.
Using this basic method the voltage applied to the gates of
both high-side and low-side MOSFETs is V
- V
. This
method works well when V
is 5V
±
10%, because the gate
drives will get at least 4.0V of drive voltage during the worst
case of V
= 4.5V and V
= 0.5V. Logic level
MOSFETs generally specify their on-resistance at V
=
4.5V. When V
= 3.3V
±
10%, the gate drive at worst case
could go as low as 2.5V. Logic level MOSFETs are not
guaranteed to turn on, or may have much higher on-
resistance at 2.5V. Sub-logic level MOSFETs, usually speci-
fied at V
= 2.5V, will work, but are more expensive, and
tend to have higher on-resistance. The circuit in
Figure 9
works well for input voltages ranging from 1V up to 14V and
V
CC
= 5V
±
10%, because the drive voltage depends only on
V
CC
.
Note that the LM2747 can be paired with a low cost linear
regulator like the LM78L05 to run from a single input rail
between 6.0 and 14V. The 5V output of the linear regulator
powers both the V
and the bootstrap circuit, providing
efficient drive for logic level MOSFETs. An example of this
circuit is shown in
Figure 10
.
Figure 11
shows a second possibility for bootstrapping the
MOSFET drives using a doubler. This circuit provides an
equal voltage drive of V
- 3V
+ V
to both the high-side
and low-side MOSFET drives. This method should only be
used in circuits that use 3.3V for both V
and V
. Even with
V
= V
= 3.0V (10% lower tolerance on 3.3V) and V
=
0.5V both high-side and low-side gates will have at least
4.5V of drive. The power dissipation of the gate drive cir-
cuitry is directly proportional to gate drive voltage, hence the
thermal limits of the LM2747 IC will quickly be reached if this
circuit is used with V
CC
or V
IN
voltages over 5V.
All the gate drive circuits shown in the above figures typically
use 100 nF ceramic capacitors in the bootstrap locations.
20150912
FIGURE 9. Basic Charge Pump (Bootstrap)
20150913
FIGURE 10. LM78L05 Feeding Basic Charge Pump
20150919
FIGURE 11. Charge Pump with Added Gate Drive
L
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