參數(shù)資料
型號： 12CE673
廠商： Microchip Technology Inc.
英文描述： HookUp/Lead Wire; Conductor Size AWG:18; No. Strands x Strand Size:65 x 36; Jacket Color:Black; Conductor Material:Copper; Jacket Material:Rubber; Leaded Process Compatible:Yes; Number of Conductors:1; Outer Diameter:0.144" RoHS Compliant: Yes
中文描述： 8引腳，8位CMOS微控制器與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲器
文件頁數(shù)： 30/116頁
文件大?。?/td> 671K
代理商： 12CE673
PIC12CE67X
DS40181B-page 30
Preliminary
1998 Microchip Technology Inc.
6.5
READ OPERATIONS
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
EEPROM address is set to one. There are three basic
types of read operations: current address read, random
read, and sequential read.
6.5.1
CURRENT ADDRESS READ
It contains an address counter that maintains the
address of the last word accessed, internally incre-
mented by one. Therefore, if the previous read access
was to address n, the next current address read opera-
tion would access data from address n + 1. Upon
receipt of the EEPROM address with the R/W bit set to
one, the EEPROM issues an acknowledge and trans-
mits the eight bit data word. The processor will not
acknowledge the transfer but does generate a stop
condition and the EEPROM discontinues transmission
(Figure 6-6).
6.5.2
RANDOM READ
Random read operations allow the processor to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
EEPROM as part of a write operation. After the word
address is sent, the processor generates a start condi-
tion following the acknowledge. This terminates the
write operation, but not before the internal address
pointer is set. Then the processor issues the control
byte again but with the R/W bit set to a one. It will then
issue an acknowledge and transmits the eight bit data
word. The processor will not acknowledge the transfer
but does generate a stop condition and the EEPROM
discontinues transmission (Figure 6-7). After this com-
mand, the internal address counter will point to the
address location following the one that was just read.
6.5.3
SEQUENTIAL READ
Sequential reads are initiated in the same way as a ran-
dom read except that after the device transmits the first
data byte, the processor issues an acknowledge as
opposed to a stop condition in a random read. This
directs the EEPROM to transmit the next sequentially
addressed 8-bit word (Figure 6-8).
To provide sequential reads, it contains an internal
address pointer which is incremented by one at the
completion of each read operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
FIGURE 6-6:
CURRENT ADDRESS READ
FIGURE 6-7:
RANDOM READ
FIGURE 6-8:
SEQUENTIAL READ
BUS ACTIVITY
PROCESSOR
SDA LINE
BUS ACTIVITY
P
S
S
T
O
P
CONTROL
BYTE
S
T
A
R
T
DATA
A
C
K
N
O
A
C
K
1
1
0
0 X X X 1
X = Don’t Care Bit
P
BUS ACTIVITY
PROCESSOR
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
A
C
K
WORD
ADDRESS (n)
CONTROL
BYTE
S
T
A
R
T
DATA (n)
A
C
K
A
C
K
N
O
A
C
K
X X X X
S 1
1
0
0 X X X 0
S 1
1
0
0 X X X 1
X = Don’t Care Bit
P
BUS ACTIVITY
PROCESSOR
SDA LINE
BUS ACTIVITY
S
T
O
P
CONTROL
BYTE
A
C
K
N
O
C
K
DATA n
DATA n + 1
DATA n + 2
DATA n + X
A
C
K
A
C
K
A
C
K
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