參數(shù)資料
型號: 101-0788
廠商: Rabbit Semiconductor
文件頁數(shù): 22/90頁
文件大?。?/td> 0K
描述: COMPUTER SGL-BOARD OP6600 W/SRAM
標(biāo)準(zhǔn)包裝: 1
系列: SBC
模塊/板類型: 單板計(jì)算機(jī)模塊
適用于相關(guān)產(chǎn)品: OP6600
其它名稱: 101-788
101-788-ND
User’s Manual
25
The Intellicom comes with a 220
termination resistor and two 680 bias resistors installed
and enabled with jumpers across pins 1–2 and 5–6 on header JP6, as shown in Figure 10.
Figure 10. RS-485 Termination and Bias Resistors
The bias and termination resistors in a multidrop network should only be enabled on both
end nodes of the network. Disable the termination and bias resistors on the intervening
Intellicom units in the network by removing both jumpers from header JP6. Note that
older versions of the Intellicom do not have this jumper feature, and the surface-mounted
bias and termination resistors shown in Figure 10 have to be removed in networks contain-
ing more than 10 Intellicom units.
Factory
Default
R59
680 W
R58
220 W
R60
680 W
485+
485
6
7
termi-
nation
bias
U10
JP6
1
2
5
6
D11
2
51
6
J5
D6
1
J7
J8
D7
TVS1
R60
R58
R59
R57
U8
U10
L1
+
C28
TP4
TP5
TP7
TP8
TP9
TP6
C36
C37
C38
C39
C40 C41 C42
C43
C44
C45
C46
C47
C48
C49
C54
R63
R64
R65
R66
R67
R68
R69
R70
R71
R72
R73
D8
D9
D10
Q9
Q10
Q1
1
JP4
U1
1
GND
485-
485+
GND
PWR
O3
O2
O1
O0
I3
I2
I1
I0
RX
TX
Z-COM
JP7
JP6
5
3
1
6
4
2
JP6
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