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| 型號(hào)： | 0W588-002-XUA |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | BelaSigna 200 - Single-Chip Audio Processing System; Package: WLCSP 40, 3.8x2.3; No of Pins: 40; Container: Tape and Reel; Qty per Container: 5000 |
| 中文描述： | 0-BIT, 33 MHz, MIXED DSP, PBGA40 |
| 封裝： | 2.3 X 3.7 MM, CSP-40 |
| 文件頁數(shù)： | 17/43頁 |
| 文件大?。?/td> | 1426K |
| 代理商： | 0W588-002-XUA |
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BelaSigna 200
8.0 Description of Analog Blocks
8.1 Input Stage
The analog audio input stage is comprised of two individual channels. For each channel, one of two possible inputs is routed to the
input of the programmable preamplifier that can be configured for bypass or gain values of 12 to 30dB (3-dB steps).
The analog signal is filtered to remove frequencies above 10kHz before it is passed into the high-fidelity 16-bit oversampling
ΣΔ A/D
converter. Subsequently, any necessary sample rate decimation is performed to downsample the signal to the desired sampling rate.
During decimation the level of the signal can be adjusted digitally for optimal gain matching between the two input channels. Any
undesired DC component can be removed by a configurable DC-removal filter that is part of the decimation circuitry. The DC removal
filter can be bypassed or configured for cut-off frequencies at 5, 10 and 20Hz.
A built-in feature allows a sampling delay to be configured between channel zero and channel one. This is useful in beam-forming
applications.
For power consumption savings either of the input channels can be disabled via software.
Figure 12: Input Stage
8.2 Output Stage
The analog audio output stage is composed of two individual channels. The first part of the output stage interpolates the signal for
highly oversampled D/A conversion and automatically configures itself for the desired oversampling rate. Here, the signal is routed to
both the
ΣΔ D/A converter and the direct digital outputs. The D/A converter translates the signal into a high-fidelity analog signal and
passes it into a reconstruction filter to smooth out the effects of sampling. The reconstruction filter has a fixed cut-off frequency at
10kHz.
From the reconstruction filter, the signal passes through the programmable output attenuator, which can adjust the signal for various
line-level outputs or mute the signal altogether. The attenuator can be bypassed or configured to a value in the interval -12 to -30dB (3-
dB steps).
The direct digital output provides a bridge driven by a pulse-density modulated output that can be used to directly drive an output
transducer without the need for an external power amplifier.
Rev. 16 | Page 24 of 43 | www.onsemi.com
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相關(guān)代理商/技術(shù)參數(shù) |
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| 0W589-005-XDS | 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC AUDIO AD/DA RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: 封裝: |
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| 0W598001EVK | 制造商:ON Semiconductor 功能描述:B250 EDK SGL PURCH - Bulk |
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