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參數(shù)資料
| 型號(hào)： | μPD78P064 |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 Bit Single Chip Microcontrollers |
| 中文描述： | 8位單片機(jī)微控制器 |
| 文件頁(yè)數(shù)： | 38/70頁(yè) |
| 文件大?。?/td> | 473K |
| 代理商： | ΜPD78P064 |
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38
m
PD78P064
AC CHARACTERISTICS
(1)
Basic Operation (T
A
= –40 to +85 °C, V
DD
= 2.0 to 6.0 V)
Parameter
Notes 1.
Main system clock f
XX
= f
X
/2 operation (when oscillation mode selection register (OSMS) is set to 00H)
2.
Main system clock f
XX
= f
X
operation (when OSMS is set to 01H)
3.
This is the value when the external clock is used. The value is 114
m
s (min.) when the crystal resonator is used.
4.
In combination with bits 0 (SCS0) and 1 (SCS1) of sampling clock select register (SCS), selection of f
sam
is
possible between f
XX
/2
N
, f
XX
/32, f
XX
/64 and f
XX
/128 (when N = 0 to 4).
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
T
CY
Operating on main system clock
(f
XX
= 2.5 MHz)
Note 1
Operating on main system clock
(f
XX
= 5.0 MHz)
Note 2
V
DD
= 2.7 to 6.0 V
0.8
2.2
0.4
0.8
64
64
32
32
m
s
m
s
m
s
m
s
4.5
￡
V
DD
￡
6.0 V
2.7
￡
V
DD
< 4.5 V
Operating on subsystem clock
40
Note 3
122
125
m
s
t
TIH00
,
4.5 V - V
DD
- 6.0 V
2/f
sam
+0.1
Note 4
m
s
t
TIL00
2.7 V - V
DD
< 4.5 V
2/f
sam
+0.2
Note 4
m
s
2.0 V - V
DD
< 2.7 V
2/f
sam
+0.5
Note 4
m
s
t
TIH01
,
V
DD
= 2.7 to 6.0 V
10
m
s
t
TIL01
20
m
s
f
TI
V
DD
= 4.5 to 6.0 V
0
4
MHz
0
275
kHz
t
TIH,
V
DD
= 4.5 to 6.0 V
100
ns
t
TIL
1.8
m
s
t
INTH
,
INTP0
8/f
sam
Note 4
m
s
t
INTL
INTP1-INTP5, P110-P117
V
DD
= 2.7 to 6.0 V
10
m
s
20
m
s
t
RST
V
DD
= 2.7 to 6.0 V
10
m
s
20
m
s
Cycle time
(Min. instruction
execution time)
TI input
frequency
RESET low level
width
TI00 input high/
low-level width
TI01 input high/
low-level width
TI1, TI2 input
high/low-level width
Interrupt input
high/low-level
width
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