![](http://datasheet.mmic.net.cn/380000/-PD789830_datasheet_16744982/-PD789830_164.png)
CHAPTER 13 INTERRUPT FUNCTIONS
164
(2)
Interrupt mask flag registers 0 and 1 (MK0, MK1)
The interrupt mask flags are used to enable and disable the corresponding maskable interrupts.
MK0 and MK1 are set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets MK0 and MK1 to FFH.
Figure 13-4. Format of Interrupt Mask Flag Register (
μ
PD789830)
Symbol
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
Address
After Reset
R/W
MK0
TMMK40
STMK00
SRMK00
SERMK00
PMK2
PMK1
PMK0
WDTMK
FFE4H
FFH
R/W
7
6
<5>
<4>
<3>
<2>
<1>
<0>
MK1
1
1
KRMK00
WTMK
WTIMK
TMMK00
TMMK4
TMMK41
FFE5H
FFH
R/W
××
MK
Interrupt Handling Control
0
Enable interrupt handling.
1
Disable interrupt handling.
Cautions 1. Bits 6 and 7 of MK1 must all be set to 0.
2. The WDTMK flag can be read- and write-accessed only when the watchdog timer is
being used as an interval timer. It must be cleared to 0 if the watchdog timer is used in
watchdog timer mode 1 or 2.
3. When port 2 is being used as an output port, and its output level is changed, an
interrupt request flag is set, because this port is also used as an external interrupt
input. To use port 2 in output mode, therefore, the interrupt mask flag must be set to 1
in advance.
Figure 13-5. Format of Interrupt Mask Flag Register (
μ
PD78F9831)
Symbol
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
Address
After Reset
R/W
MK0
TMMK40
STMK00
SRMK00
SERMK00
PMK2
PMK1
PMK0
WDTMK
FFE4H
FFH
R/W
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
MK1
PMK4
PMK3
KRMK00
WTMK
WTIMK
TMMK00
TMMK4
TMMK41
FFE5H
FFH
R/W
××
MK
Interrupt Handling Control
0
Enable interrupt handling.
1
Disable interrupt handling.
Cautions 1. The WDTMK flag can be read- and write-accessed only when the watchdog timer is
being used as an interval timer. It must be cleared to 0 if the watchdog timer is used in
watchdog timer mode 1 or 2.
2. When ports 2 and 4 are being used as an output port, and its output level is changed,
an interrupt request flag is set, because this port is also used as an external interrupt
input. To use ports 2 and 4 in output mode, therefore, the interrupt mask flag must be
set to 1 in advance.