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16
LIST OF FIGURES (3/4)
Figure No.
Title
Page
12-1.
12-2.
12-3.
12-4.
12-5.
12-6.
12-7.
12-8.
Block Diagram of LCD Controller/Driver...........................................................................................150
Format of LCD20 Mode Register......................................................................................................151
Format of Alternate Port Function Switching Register......................................................................152
Format of LCD20 Clock Selection Register......................................................................................153
Relationships between LCD Display Data Memory Contents and Segment/Common Outputs .......154
Example LCD Drive Waveform between Segment Signal and Common Signal...............................156
Connection of Power Supply for LCD Drive......................................................................................157
Example of Connecting LCD Panel ..................................................................................................158
13-1.
13-2.
13-3.
13-4.
13-5.
13-6.
13-7.
13-8.
13-9.
13-10.
13-11.
13-12.
13-13.
13-14.
13-15.
13-16.
Basic Configuration of Interrupt Function .........................................................................................161
Format of Interrupt Request Flag Register (
μ
PD789830).................................................................163
Format of Interrupt Request Flag Register (
μ
PD78F9831)...............................................................163
Format of Interrupt Mask Flag Register (
μ
PD789830)......................................................................164
Format of Interrupt Mask Flag Register (
μ
PD78F9831)....................................................................164
Format of External Interrupt Mode Register 0 ..................................................................................165
Format of External Interrupt Mode Register 1 (
μ
PD78F9831)..........................................................166
Program Status Word Configuration.................................................................................................167
Format of Key Return Mode Register 00..........................................................................................167
Block Diagram of Falling Edge Detection Circuit..............................................................................168
Flowchart from Non-Maskable Interrupt Request Generation to Acceptance...................................170
Timing of Non-Maskable Interrupt Request Acceptance ..................................................................170
Accepting Non-Maskable Interrupt Request.....................................................................................170
Interrupt Request Acceptance Program Algorithm ...........................................................................171
Interrupt Request Acceptance Timing (Example of MOV A,r) ..........................................................172
Interrupt Request Acceptance Timing (When Interrupt Request Flag Is Generated at the Last
Clock During Instruction Execution)..................................................................................................172
Example of Multiplexed Interrupt......................................................................................................173
13-17.
14-1.
14-2.
14-3.
14-4.
14-5.
Format of Oscillation Settling Time Selection Register.....................................................................176
Releasing HALT Mode by Interrupt ..................................................................................................178
Releasing HALT Mode by RESET Input...........................................................................................179
Releasing STOP Mode by Interrupt..................................................................................................181
Releasing STOP Mode by RESET Input ..........................................................................................182
15-1.
15-2.
15-3.
15-4.
Block Diagram of Reset Function.....................................................................................................183
Reset Timing by RESET Input..........................................................................................................184
Reset Timing by Overflow in Watchdog Timer .................................................................................184
Reset Timing by RESET Input in STOP Mode .................................................................................184