![](http://datasheet.mmic.net.cn/380000/-PD784031Y_datasheet_16744922/-PD784031Y_24.png)
μ
PD784031Y
24
Table 6-1. Special Function Registers (SFRs) (3/4)
Address
Note 1
Special Function Register (SFR) Name
Symbol
R/W
Bit units for manipulation
After reset
1 bit
8 bits
16 bits
0FF84H
Clocked serial interface mode register 1
CSIM1
R/W
√
√
–
00H
0FF85H
Clocked serial interface mode register 2
CSIM2
√
√
–
0FF86H
Serial shift register
SIO
–
√
–
0FF88H
Asynchronous serial interface mode register
ASIM
√
√
–
0FF89H
Asynchronous serial interface mode register 2 ASIM2
√
√
–
0FF8AH
Asynchronous serial interface status register
ASIS
R
√
√
–
0FF8BH
Asynchronous serial interface status register 2
ASIS2
√
√
–
0FF8CH
Serial receive buffer: UART0
RXB
–
√
–
Undefined
Serial transmit shift register: UART0
TXS
W
–
√
–
Serial shift register: IOE1
SIO1
R/W
–
√
–
0FF8DH
Serial receive buffer: UART2
RXB2
R
–
√
–
Undefined
Serial transmit shift register: UART2
TXS2
W
–
√
–
Serial shift register: IOE2
SIO2
R/W
–
√
–
0FF90H
Baud rate generator control register
BRGC
–
√
–
00H
0FF91H
Baud rate generator control register 2
BRGC2
–
√
–
0FFA0H
External interrupt mode register 0
INTM0
√
√
–
0FFA1H
External interrupt mode register 1
INTM1
√
√
–
0FFA4H
Sampling clock select register
SCS0
–
√
–
0FFA8H
In-service priority register
ISPR
R
√
√
–
0FFAAH
Interrupt mode control register
IMC
R/W
√
√
–
80H
0FFACH
Interrupt mask register 0L
MK0L MK0
√
√
√
FFFFH
0FFADH
Interrupt mask register 0H
MK0H
√
√
0FFAEH
Interrupt mask register 1L
MK1L
√
√
–
FFH
0FFC0H
Standby control register
STBC
–
√
Note 2
–
30H
0FFC2H
Watchdog timer mode register
WDM
–
√
Note 2
–
00H
0FFC4H
Memory expansion mode register
MM
√
√
–
20H
0FFC5H
Hold mode register
HLDM
√
√
–
00H
0FFC6H
Clock output mode register
CLOM
√
√
–
0FFC7H
Programmable wait control register 1
PWC1
–
√
–
AAH
0FFC8H
Programmable wait control register 2
PWC2
–
–
√
AAAAH
Notes 1.
When the LOCATION 0 instruction is executed. When the LOCATION 0FH instruction is executed,
“F0000H” is added to this value.
2.
Data can be written by using only a dedicated instruction such as MOV STBC, #byte and MOV
WDM, #byte, and cannot be written with any other instructions.