參數(shù)資料
型號(hào)： μPD784031
廠商： NEC Corp.
英文描述： 8/16 Bit Single Chip Microcontrollers(8/16 位微控制器)
中文描述： 8 / 16位單片機(jī)微控制器（8 / 16位微控制器）
文件頁(yè)數(shù)： 25/90頁(yè)
文件大?。?/td> 301K
代理商： ΜPD784031
μ
PD784031
25
Address
Note 1
Special function register (SFR) name
Abbreviation
R/W
Manipulatable bits
When reset
1 bit
8 bits 16 bits
0FF84H
Synchronous serial interface mode register 1
CSIM1
R/W
G
G
G
G
-
00H
0FF85H
Synchronous serial interface mode register 2
CSIM2
G
G
G
G
-
0FF86H
Serial shift register
SIO
-
G
G
-
0FF88H
Asynchronous serial interface mode register
ASIM
G
G
G
G
-
0FF89H
Asynchronous serial interface mode register 2
ASIM2
G
G
G
G
-
0FF8AH
Asynchronous serial interface status register
ASIS
R
G
G
G
G
-
0FF8BH
Asynchronous serial interface status register 2
ASIS2
G
G
G
G
-
0FF8CH
Serial receive buffer: UART0
RXB
-
G
G
-
Undefined
Serial transmission shift register: UART0
TXS
W
-
G
G
-
Serial shift register: IOE1
SIO1
R/W
-
G
G
-
0FF8DH
Serial receive buffer: UART2
RXB2
R
-
G
G
-
Serial transmission shift register: UART2
TXS2
W
-
G
G
-
Serial shift register: IOE2
SIO2
R/W
-
G
G
-
0FF90H
Baud rate generator control register
BRGC
-
G
G
-
00H
0FF91H
Baud rate generator control register 2
BRGC2
-
G
G
-
0FFA0H
External interrupt mode register 0
INTM0
G
G
G
G
-
0FFA1H
External interrupt mode register 1
INTM1
G
G
G
G
-
0FFA4H
Sampling clock selection register
SCS0
-
G
G
-
0FFA8H
In-service priority register
ISPR
R
G
G
G
G
-
0FFAAH
Interrupt mode control register
IMC
R/W
G
G
G
G
-
80H
0FFACH
Interrupt mask register 0L
MK0L MK0
G
G
G
G
G
G
FFFFH
0FFADH
Interrupt mask register 0H
MK0H
G
G
G
G
0FFAEH
Interrupt mask register 1L
MK1L
G
G
G
G
-
FFH
0FFC0H
Standby control register
STBC
-
G
G
Note 2
-
30H
0FFC2H
Watchdog timer mode register
WDM
-
G
G
Note 2
-
00H
0FFC4H
Memory expansion mode register
MM
G
G
G
G
-
20H
0FFC5H
Hold mode register
HLDM
G
G
G
G
-
00H
0FFC6H
Clock output mode register
CLOM
G
G
G
G
-
0FFC7H
Programmable wait control register 1
PWC1
-
G
G
-
AAH
0FFC8H
Programmable wait control register 2
PWC2
-
-
G
G
AAAAH
Table 7-1. Special Function Registers (SFRs) (3/4)
Notes 1.
Applicable when the LOCATION 0 instruction is executed. When the LOCATION 0FH instruction is
executed, F0000H is added to each address.
2.
A write operation can be performed only with special instructions MOV STBC,#byte and MOV
WDM,#byte. Other instructions cannot perform a write operation.
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