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164
CHAPTER 6 APPLICATIONS OF 8-BIT TIMER/EVENT COUNTER
Figure 6-1. Format of Timer Clock Select Register 1
(
μ
PD78054, 78054Y, 78064, 78064Y, 78078, 78078Y, 780058, 780058Y, 780308,
780308Y, 78058F, 78058FY, 78064B, 78075B, 78075BY subseries,
μ
PD78070A,
78070AY)
TCL13 TCL12 TCL11 TCL10
Selects count clock of 8-bit timer register 1
MCS = 1
MCS = 0
0
0
0
0
Falling edge of TI1
0
0
0
1
Rising edge of TI1
0
1
1
0
f
XX
/2
f
X
/2 (2.5 MHz)
f
X
/2
2
(1.25 MHz)
0
1
1
1
f
XX
/2
2
f
X
/2
2
(1.25 MHz)
f
X
/2
3
(625 kHz)
1
0
0
0
f
XX
/2
3
f
X
/2
3
(625 kHz)
f
X
/2
4
(313 kHz)
1
0
0
1
f
XX
/2
4
f
X
/2
4
(313 kHz)
f
X
/2
5
(156 kHz)
1
0
1
0
f
XX
/2
5
f
X
/2
5
(156 kHz)
f
X
/2
6
(78.1 kHz)
1
0
1
1
f
XX
/2
6
f
X
/2
6
(78.1 kHz)
f
X
/2
7
(39.1 kHz)
1
1
0
0
f
XX
/2
7
f
X
/2
7
(39.1 kHz)
f
X
/2
8
(19.5 kHz)
1
1
0
1
f
XX
/2
8
f
X
/2
8
(19.5 kHz)
f
X
/2
9
(9.8 kHz)
1
1
1
0
f
XX
/2
9
f
X
/2
9
(9.8 kHz)
f
X
/2
10
(4.9 kHz)
1
1
1
1
f
XX
/2
11
f
X
/2
11
(2.4 kHz)
f
X
/2
12
(1.2 kHz)
Others
Setting prohibited
TCL17 TCL16 TCL15 TCL14
Selects count clock of 8-bit timer register 2
MCS = 1
MCS = 0
0
0
0
0
Falling edge of TI2
0
0
0
1
Rising edge of TI2
0
1
1
0
f
XX
/2
f
X
/2 (2.5 MHz)
f
X
/2
2
(1.25 MHz)
0
1
1
1
f
XX
/2
2
f
X
/2
2
(1.25 MHz)
f
X
/2
3
(625 kHz)
1
0
0
0
f
XX
/2
3
f
X
/2
3
(625 kHz)
f
X
/2
4
(313 kHz)
1
0
0
1
f
XX
/2
4
f
X
/2
4
(313 kHz)
f
X
/2
5
(156 kHz)
1
0
1
0
f
XX
/2
5
f
X
/2
5
(156 kHz)
f
X
/2
6
(78.1 kHz)
1
0
1
1
f
XX
/2
6
f
X
/2
6
(78.1 kHz)
f
X
/2
7
(39.1 kHz)
1
1
0
0
f
XX
/2
7
f
X
/2
7
(39.1 kHz)
f
X
/2
8
(19.5 kHz)
1
1
0
1
f
XX
/2
8
f
X
/2
8
(19.5 kHz)
f
X
/2
9
(9.8 kHz)
1
1
1
0
f
XX
/2
9
f
X
/2
9
(9.8 kHz)
f
X
/2
10
(4.9 kHz)
1
1
1
1
f
XX
/2
11
f
X
/2
11
(2.4 kHz)
f
X
/2
12
(1.2 kHz)
Others
Setting prohibited
Caution Before writing new data to TCL1, stop the timer operation once.
7
6
5
4
3
2
Symbol
1
0
FF41H
TCL10
TCL1
TCL11
TCL13 TCL12
TCL14
TCL15
TCL16
TCL17
Address
At reset
R/W
00H
R/W