
μ
PD78070AY
38
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Input capacitance
C
IN
f = 1 MHz, Unmeasured pins returned to 0 V.
15
pF
Output capacitance C
OUT
15
pF
I/O capacitance
C
IO
15
pF
Resonator
Recommended
Circuit
Parameter
Test Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
resonator
Oscillation frequency
(f
X
)
Note 1
V
DD
= Oscillation voltage
range
1.0
5.0
MHz
Oscillation stabilization
time
Note 2
After V
DD
came to MIN.
of oscillation voltage range
4
ms
Crystal
resonator
Oscillation frequency
(f
X
)
Note 1
1.0
5.0
MHz
Oscillation stabilization
time
Note 2
V
DD
= 4.5 to 5.5 V
10
30
ms
External
clock
X1 input frequency
(f
X
)
Note 1
1.0
5.0
MHz
X1 input high- and
low-level widths (t
XH
, t
XL
)
85
500
ns
CAPACITANCE (T
A
= 25
°
C, V
DD
= V
SS
= 0 V)
MAIN SYSTEM CLOCK OSCILLATOR CHARACTERISTICS (T
A
= –40 to +85
°
C, V
DD
= 2.7 to 5.5 V)
Notes 1.
Only the oscillator characteristics are shown. For the instruction execution time, refer to
AC Character-
istics
.
2.
Time required for oscillation to stabilize after a reset or the STOP mode has been released.
Cautions
1.
When using the oscillation circuit of the main system clock, wire the portion enclosed in dotted
lines in the figures as follows to avoid adverse influences on the wiring capacitance:
Keep the wiring length as short as possible.
Do not cross the wiring over other signal lines.
Do not route the wiring in the vicinity of lines through which a high fluctuating current flows.
Always keep the ground point of the capacitor of the oscillation circuit at the same potential
as V
SS
.
Do not connect the power source to a ground pattern through which a high current flows.
Do not extract signals from the oscillation circuit.
2.
When the main system clock is stopped and the device is operating on the subsystem clock,
wait until the oscillation stabilization time has been secured by the program before switching
back to the main system clock.
IC
C1
X1
C2
R1
X2
IC
C1
X1
C2
R1
X2
X2
X1
PD74HCU04
μ