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CHAPTER 21 RESET FUNCTION
Table 21-1. Status of Each Hardware after Reset (1/2)
Hardware
Status after Reset
Program counter (PC)
Note 1
Contents of reset vector table
(0000H, 0001H) are set
Stack pointer (SP)
Undefined
Program status word (PSW)
02H
RAM
Data memory
Undefined
Note 2
General-purpose register
Undefined
Note 2
Port (output latch)
Ports 0-3 (P0-P3)
00H
Ports 4-6 (P4-P6)
Undefined
Port mode register
(PM0)
1FH
(PM1, PM2, PM3, PM5, PM6)
FFH
Pull-up resistor option register (PUO)
00H
Processor clock control register (PCC)
04H
Memory extension mode register (MM)
10H
Memory size select register (IMS)
Note 3
Internal extension RAM size select register (IXS)
Note 3
Oscillation stabilization time select register (OSTS)
04H
16-bit timer/event counter
Timer register (TM0)
0000H
Compare register (CR00)
Undefined
Capture register (CR01)
Undefined
Clock select register (TCL0)
00H
Mode control register (TMC0)
00H
Output control register (TOC0)
00H
8-bit timer/event counter
Timer register (TM1, TM2)
00H
Compare register (CR10, CR20)
Undefined
Clock select register (TCL1)
00H
Mode control register (TMC1)
00H
Output control register (TOC1)
00H
Notes 1.
Only the contents of the PC among hardware become undefined during reset input and oscillation
stabilization time wait. The other status is not different from that after reset as above.
2.
The status before reset is retained in the standby mode.
3.
The values at reset of the memory size select register (IMS) and internal extension RAM size select
register (IXS) differ depending on the model, as follows:
μ
PD78011F
μ
PD78011FY
μ
PD78012FY
μ
PD78013FY
μ
PD78014FY
μ
PD78015FY
μ
PD78016FY
μ
PD78018FY
μ
PD78P018FY
μ
PD78012F
μ
PD78013F
μ
PD78014F
μ
PD78015F
μ
PD78016F
μ
PD78018F
μ
PD78P018F
IMS 42H
44H
C6H
C8H
CAH
CCH
CFH
IXS
0CH
0BH
0AH
When using the mask ROM model, do not set a value other than that at reset to IMS and IXS, except
when the external device extension function of the
μ
PD78018F and 78018FY is used.