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CHAPTER 8 16-BIT TIMER/EVENT COUNTER
(1) 16-bit compare register (CR00)
This register always compares its set value in CR00 with the count value of the 16-bit timer register (TM0).
When the two values coincide, an interrupt request (INTTM0) is generated.
When TM0 is set as an interval timer, this register can also be used to hold interval time, and when set as
a PWM output operation, this can also be used to set a pulse width.
CR00 is set by a 16-bit memory manipulation instruction in a range of 0001H-FFFFH.
The contents of this register become undefined when the RESET signal is input.
Cautions 1. Set data of PWM (14 bits) to the high-order 14 bits of CR00. At this time, set the low-order
2 bits to 00.
2. Set CR00 to any value other than 0000H. Thus, one pulse will not be counted when the
timer is used as an event counter.
3. If the new value of CR00 is less than the value of the 16-bit timer register (TM0), TM0
continues counting, overflows, and counts again from 0. If the new value of CR00 (M)
is less than the previous value (N), it is necessary to restart the timer.
(2) 16-bit capture register (CR01)
This 16-bit register captures the contents of the 16-bit timer register (TM0).
The capture trigger is the valid edge input to the INTP0/TI0 pin. The valid edge of INTP0 is set by the external
interrupt mode register (INTM0).
CR01 is read by a 16-bit memory manipulation instruction.
The contents of this register become undefined when the RESET signal is input.
Caution If the valid edge of the TI0/P00 pin is input while CR01 is read, CR01 does not perform the
capture operation but holds data. However, the interrupt request flag (RIF0) is set by
detection of the valid edge.
(3) 16-bit timer register (TM0)
This 16-bit register counts the number of count pulses.
The value of TM0 can be read by a 16-bit memory manipulation instruction.
This register is initialized to 0000H when the RESET signal is input.
Caution Because the value of TM0 is read via CR01, the value of CR01 is destroyed.