583
APPENDIX E REVISION HISTORY
The revision history of this edition is listed in the table below. “Chapter” indicates the chapter of the preceding
edition where the revision was made.
Edition
Revisions
Chapter
2nd
Change of following block diagrams of ports:
CHAPTER 6 PORT FUNCTIONS
edition
Figures 6-5
and
6-7 P20, P21, and P23 to P26 Block Diagram
,
Figures 6-6
and
6-8 P22 and P27 Block Diagram
,
Figure 6-9
P30 to P37 Block Diagram
, and
Figure 6-16 P71 and P72
Block Diagram
Addition of
Table 7-2 Relationships between CPU Clock and
CHAPTER 7 CLOCK GENERATOR
Minimum Instruction Execution Time
Addition of
Figures 9-10 and 9-13 Square Wave Output
CHAPTER 9 8-BIT TIMER/EVENT COUNTER
Operation Timing
Correction of Note on BSYE in
Figure 16-5 Serial Bus
CHAPTER 16 SERIAL INTERFACE
Interface Control Register Format
CHANNEL 0 (
μ
PD780058 Subseries)
Addition of Caution to
16.4.3 (2) (a) Bus release signal (REL)
and
(b) Command signal (CMD)
Addition of
(3) MSB/LSB switching as the start bit
to
18.4.2
CHAPTER 18 SERIAL INTERFACE
3-wire serial I/O mode operation
CHANNEL 1
Change of
18.4.3 (3) (d) Busy control option, (e) Busy &
strobe control option
, and
(f) Bit slippage detection function
in old edition to
(4) Synchronization control
, and improvement
of explanation
Correction of
Figure 19-11 Receive Error Timing
CHAPTER 19 SERIAL INTERFACE
Addition of
(3) MSB/LSB switching as the start bit
to
19.4.3
CHANNEL 2
3-wire serial I/O mode
Addition of
19.4.4 Restrictions in UART mode
Addition of Note to
26.1 Memory Size Switching Register
CHAPTER 26
μ
PD78F0058, 78F0058Y
26.3 Flash Memory Programming
Change of product name of flash programmer from Flashpro to
Flashpro II
Addition of
APPENDIX A DIFFERENCES AMONG
μ
PD78054,
APPENDIX A DIFFERENCES AMONG
78058F, AND 780058 SUBSERIES
μ
PD78054, 78058F, AND 780058 SUBSERIES
Total revision: Support of in-circuit emulators IE-78K0-NS and
APPENDIX B DEVELOPMENT TOOLS
IE-78001-R-A
Total revision: Deletion of fuzzy inference development support
APPENDIX C EMBEDDED SOFTWARE
system