230
CHAPTER 9 8-BIT TIMER/EVENT COUNTER
(3) Square-wave output operation
The 8-bit timer/event counters 1 and 2 output a square wave with any selected frequency at intervals specified
by the value set in advance to 8-bit compare registers 10 and 20 (CR10 and CR20). To set a count value,
set the value of the high-order 8 bits to CR20, and the value of the low-order 8 bits to CR10.
The TO2/P32 pin output status is reversed at intervals of the count value preset to CR10 and CR20 by setting
bit 4 (TOE2) of the 8-bit timer output control register (TOC1) to 1. This enables a square wave with any selected
frequency to be output.
Table 9-10. Square-Wave Output Ranges When 2-channel 8-bit Timer/Event Counters
(TM1 and TM2) Are Used as 16-bit Timer/Event Counter
Minimum Pulse Time
Maximum Pulse Time
Resolution
MCS = 1
MCS = 0
MCS = 1
MCS = 0
MCS = 1
MCS = 0
2
×
1/f
X
(400 ns)
2
2
×
1/f
X
(800 ns)
2
17
×
1/f
X
(26.2 ms)
2
18
×
1/f
X
(52.4 ms)
2
×
1/f
X
(400 ns)
2
2
×
1/f
X
(800 ns)
2
2
×
1/f
X
(800 ns)
2
3
×
1/f
X
(1.6
μ
s)
2
18
×
1/f
X
(52.4 ms)
2
19
×
1/f
X
(104.9 ms)
2
2
×
1/f
X
(800 ns)
2
3
×
1/f
X
(1.6
μ
s)
2
3
×
1/f
X
(1.6
μ
s)
2
4
×
1/f
X
(3.2
μ
s)
2
19
×
1/f
X
(104.9 ms)
2
20
×
1/f
X
(209.7 ms)
2
3
×
1/f
X
(1.6
μ
s)
2
4
×
1/f
X
(3.2
μ
s)
2
4
×
1/f
X
(3.2
μ
s)
2
5
×
1/f
X
(6.4
μ
s)
2
20
×
1/f
X
(209.7 ms)
2
21
×
1/f
X
(419.4 ms)
2
4
×
1/f
X
(3.2
μ
s)
2
5
×
1/f
X
(6.4
μ
s)
2
5
×
1/f
X
(6.4
μ
s)
2
6
×
1/f
X
(12.8
μ
s)
2
21
×
1/f
X
(419.4 ms)
2
22
×
1/f
X
(838.9 ms)
2
5
×
1/f
X
(6.4
μ
s)
2
6
×
1/f
X
(12.8
μ
s)
2
6
×
1/f
X
(12.8
μ
s)
2
7
×
1/f
X
(25.6
μ
s)
2
22
×
1/f
X
(838.9 ms)
2
23
×
1/f
X
(1.7 s)
2
6
×
1/f
X
(12.8
μ
s)
2
7
×
1/f
X
(25.6
μ
s)
2
7
×
1/f
X
(25.6
μ
s)
2
8
×
1/f
X
(51.2
μ
s)
2
23
×
1/f
X
(1.7 s)
2
24
×
1/f
X
(3.4 s)
2
7
×
1/f
X
(25.6
μ
s)
2
8
×
1/f
X
(51.2
μ
s)
2
8
×
1/f
X
(51.2
μ
s)
2
9
×
1/f
X
(102.4
μ
s)
2
24
×
1/f
X
(3.4 s)
2
25
×
1/f
X
(6.7 s)
2
8
×
1/f
X
(51.2
μ
s)
2
9
×
1/f
X
(102.4
μ
s)
2
9
×
1/f
X
(102.4
μ
s)
2
10
×
1/f
X
(204.8
μ
s)
2
25
×
1/f
X
(6.7 s)
2
26
×
1/f
X
(13.4 s)
2
9
×
1/f
X
(102.4
μ
s)
2
10
×
1/f
X
(204.8
μ
s)
2
11
×
1/f
X
(409.6
μ
s)
2
12
×
1/f
X
(819.2
μ
s)
2
27
×
1/f
X
(26.8 s)
2
28
×
1/f
X
(53.7 s)
2
11
×
1/f
X
(409.6
μ
s)
2
12
×
1/f
X
(819.2
μ
s)
Remarks 1.
f
X
: Main system clock oscillation frequency
2.
MCS : Bit 0 of oscillation mode selection register (OSMS)
3.
Values in parentheses apply to operation with f
X
= 5.0 MHz.