參數(shù)資料
型號(hào)： μPD75P70076
廠商： NEC Corp.
英文描述： 4 Bit Single Chip Microcontrollers(4位單片微控制器)
中文描述： 4位單片微控制器（4位單片微控制器）
文件頁(yè)數(shù)： 47/62頁(yè)
文件大小： 290K
代理商： ΜPD75P70076
m
PD75P0076
47
DC PROGRAMMING CHARACTERISTICS (T
A
= 25 ± 5°C, V
DD
= 6.0 ± 0.25 V, V
PP
= 12.5 ± 0.3 V, V
SS
= 0 V)
Parameter
Symbol
Test conditions
MIN.
TYP.
MAX.
Unit
Input voltage high
V
IH1
Except X1, X2
0.7V
DD
V
DD
V
V
IH2
X1, X2
V
DD
–0.5
V
DD
V
Input voltage low
V
IL1
Except X1, X2
0
0.3V
DD
V
V
IL2
X1, X2
0
0.4
V
Input leakage current
I
LI
V
IN
= V
IL
or V
IH
10
m
A
Output voltage high
V
OH
I
OH
= –1 mA
V
DD
–1.0
V
Output voltage low
V
OL
I
OL
= 1.6 mA
0.4
V
V
DD
power supply current
I
DD
30
mA
V
PP
power supply current
I
PP
MD0 = V
IL
, MD1 = V
IH
30
mA
Cautions 1. Avoid exceeding +13.5 V for V
PP
including the overshoot.
2. V
DD
must be applied before V
PP
, and cut after V
PP
.
AC PROGRAMMING CHARACTERISTICS (T
A
= 25 ± 5°C, V
DD
= 6.0 ± 0.25 V, V
PP
= 12.5 ± 0.3 V, V
SS
= 0 V)
Parameter
Symbol
Note 1
Test conditions
MIN.
TYP.
MAX.
Unit
Address setup time
Note 2
(to MD0
)
t
AS
t
AS
2
m
s
MD1 setup time (to MD0
)
t
M1S
t
OES
2
m
s
Data setup time (to MD0
)
t
DS
t
DS
2
m
s
Address hold time
Note 2
(from MD0
)
t
AH
t
AH
2
m
s
Data hold time (from MD0
)
t
DH
t
DH
2
m
s
MD0
data output float delay time
t
DF
t
DF
0
130
ns
V
PP
setup time (to MD3
)
t
VPS
t
VPS
2
m
s
V
DD
setup time (to MD3
)
t
VDS
t
VCS
2
m
s
Initial program pulse width
t
PW
t
PW
0.95
1.0
1.05
ms
Additional program pulse width
t
OPW
t
OPW
0.95
21.0
ms
MD0 setup time (to MD1
)
t
M0S
t
CES
2
m
s
MD0
data output delay time
t
DV
t
DV
MD0 = MD1 = V
IL
1
m
s
MD1 hold time (from MD0
)
t
M1H
t
OEH
t
M1H
+ t
M1R
50
m
s
2
m
s
MD1 recovery time (from MD0
)
t
M1R
t
OR
2
m
s
Program counter reset time
t
PCR
–
10
m
s
X1 input high-/low-level width
t
XH
,
t
XL
–
0.125
m
s
X1 input frequency
f
X
–
4.19
MHz
Initial mode set time
t
I
–
2
m
s
MD3 setup time (to MD1
)
t
M3S
–
2
m
s
MD3 hold time (from MD1
)
t
M3H
–
2
m
s
MD3 setup time (to MD0
)
t
M3SR
–
During program memory read
2
m
s
Address
Note 2
data output delay time
t
DAD
t
ACC
During program memory read
2
m
s
Address
Note 2
data output hold time
t
HAD
t
OH
During program memory read
0
130
ns
MD3 hold time (from MD0
)
t
M3HR
–
During program memory read
2
m
s
MD3
data output float delay time
t
DFR
–
During program memory read
2
m
s
Notes1.
Corresponding symbol of
m
PD27C256A
2.
The internal address signal is incremented by 1 at the rising edge of the fourth X1 input and is not
connected to the pin.
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