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參數(shù)資料
| 型號(hào)： | μPD75P3116 |
| 廠商： | NEC Corp. |
| 英文描述： | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| 中文描述： | 4位單片微控制器（4位單片微控制器） |
| 文件頁(yè)數(shù)： | 20/60頁(yè) |
| 文件大?。?/td> | 350K |
| 代理商： | ΜPD75P3116 |
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μ
PD75P3116
20
(3) Description of symbols used in addressing area
Remarks 1.
MB indicates access-enabled memory banks.
2.
In area *2, MB = 0 for both MBE and MBS.
3.
In areas *4 and *5, MB = 15 for both MBE and MBS.
4.
Areas *6 to *11 indicate corresponding address-enabled areas.
(4) Description of machine cycles
S indicates the number of machine cycles required for skipping of skip-specified instructions. The value of S varies as
shown below.
No skip .....................................................................S = 0
Skipped instruction is 1-byte or 2-byte instruction....S = 1
Skipped instruction is 3-byte instruction
Note
..............S = 2
Note
3-byte instructions: BR !addr, BRA !addr1, CALL !addr, and CALLA !addr1
Caution
The GETI instruction is skipped for one machine cycle.
One machine cycle equals one cycle (= t
CY
) of the CPU clock
Φ
. Use the PCC setting to select among four cycle times.
MB = 0 (000H to 07FH)
MB = 15 (F80H to FFFH)
MB = MBS
MBS = 0, 1, 15
MB = MBE MBS
MBS = 0, 1, 15
*1
MB = 0
*2
MBE = 1 :
MBE = 0 :
*3
MB = 15, fmem = FB0H to FBFH, FF0H to FFFH
MB = 15, pmem = FC0H to FFFH
addr = 0000H to 3FFFH
*4
*5
*6
addr, addr1 =
*7
(Current PC) –15 to (Current PC) –1
(Current PC) +2 to (Current PC) +16
*8
caddr = 0000H to 0FFFH (PC
13
,
12
= 00B) or
1000H to 1FFFH (PC
13
,
12
= 01B) or
2000H to 2FFFH (PC
13
,
12
= 10B) or
3000H to 3FFFH (PC
13
,
12
= 11B)
faddr = 0000H to 07FFH
taddr = 0020H to 007FH
addr1 = 0000H to 3FFFH (Mk II mode only)
*9
*10
*11
Program memory
addressing
Data memory
addressing
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