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參數(shù)資料
| 型號： | μPD753106 |
| 廠商： | NEC Corp. |
| 英文描述： | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| 中文描述： | 4位單片微控制器（4位單片微控制器） |
| 文件頁數(shù)： | 58/90頁 |
| 文件大?。?/td> | 419K |
| 代理商： | ΜPD753106 |
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58
μ
PD753104, 753106, 753108
Instruction
group
Number
of bytes
Number
of machine
cycles
Addressing
area
Mnemonic
Operand
Operation
Skip condition
Special
GETI
Note 1, 2
taddr
1
3
μ
PD753104
When TBR instruction
PC
11–0
<- (taddr)
3–0
+ (taddr+1)
*10
When TCALL instruction
(SP–4) (SP–1) (SP–2) <- PC
11–0
(SP–3) <- MBE, RBE, 0, 0
PC
11–0
<- (taddr)
3–0
+ (taddr+1)
SP <- SP–4
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
μ
PD753106, 753108
When TBR instruction
PC
12–0
<- (taddr)
4–0
+ (taddr+1)
(SP–4) (SP–1) (SP–2) <- PC
11–0
(SP–3) <- MBE, RBE, 0, PC
12
PC
12–0
<- (taddr)
4–0
+ (taddr+1)
SP <- SP–4
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
3
μ
PD753104
When TBR instruction
PC
11–0
<- (taddr)
3–0
+ (taddr+1)
*10
(SP–6) (SP–3) (SP–4) <- PC
11–0
(SP–5) <- 0, 0, 0, 0
(SP–2) <- x, x, MBE, RBE
PC
11–0
<- (taddr)
3–0
+ (taddr+1)
SP <- SP–6
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
3
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
3
μ
PD753106, 753108
When TBR instruction
PC
12–0
<- (taddr)
4–0
+ (taddr+1)
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
4
When TCALL instruction
(SP–6) (SP–3) (SP–4) <- PC
11–0
(SP–5) <- 0, 0, 0, PC
12
(SP–2) <- x, x, MBE, RBE
PC
12–0
<- (taddr)
4–0
+ (taddr+1)
SP <- SP–6
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
3
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
Notes 1.
The TBR and TCALL instructions are the table definition assembler pseudo instructions of the GETI
instruction.
The above operations in the double boxes can be performed only in the Mk II mode. The other
operations can be performed only in the Mk I mode.
2.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| μPD753108 | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| μPD753204 | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| μPD753208 | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| μPD753206 | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| μPD75P2316 | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
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