參數(shù)資料
型號: μPD753106
廠商: NEC Corp.
英文描述: 4 Bit Single Chip Microcontrollers(4位單片微控制器)
中文描述: 4位單片微控制器(4位單片微控制器)
文件頁數(shù): 16/90頁
文件大小: 419K
代理商: ΜPD753106
16
μ
PD753104, 753106, 753108
4. SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE
4.1 Difference between Mk I Mode and Mk II Mode
The CPU of the
μ
PD753108 has the following two modes: Mk I and Mk II, either of which can be selected. The
mode can be switched by bit 3 of the stack bank select register (SBS).
Mk I mode:
Upward compatible with the
μ
PD75308B. Can be used in the 75XL CPU with a ROM capacity
of up to 16 Kbytes.
Mk II mode: Incompatible with the
μ
PD75308B. Can be used in all the 75XL CPU’s including those products
whose ROM capacity is more than 16 Kbytes.
Table 4-1. Differences between Mk I Mode and Mk II Mode
Mk I mode
Mk II mode
Number of stack bytes
for subroutine instructions
2 bytes
3 bytes
BRA !addr1 instruction
CALLA !addr1 instruction
Not available
Available
CALL !addr instruction
3 machine cycles
4 machine cycles
CALLF !faddr instruction
2 machine cycles
3 machine cycles
Caution
The Mk II mode supports a program area exceeding 16 Kbytes for the 75X and 75XL
Series. Therefore, this mode is effective for enhancing software compatibility with
products exceeding 16 Kbytes.
When the Mk II mode is selected, the number of stack bytes used during execution of
subroutine call instructions increases by one byte per stack compared to the Mk I mode.
When the CALL !addr and CALLF !faddr instructions are used, the machine cycle
becomes longer by one machine cycle. Therefore, use the Mk I mode if the RAM
efficiency and processing performance are more important than software compatibility.
相關PDF資料
PDF描述
μPD753108 4 Bit Single Chip Microcontrollers(4位單片微控制器)
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