參數(shù)資料
型號(hào): μPD70F3008
廠商: NEC Corp.
英文描述: 16/32 Bit Single Chip Microcontrollers(16/32 位單片微控制器)
中文描述: 16/32位單片機(jī)微控制器(16/32位單片微控制器)
文件頁(yè)數(shù): 111/141頁(yè)
文件大?。?/td> 374K
代理商: ΜPD70F3008
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99
CHAPTER 6 INTERRUPT AND EXCEPTION
6.3 Restoring from Interrupt/Exception
All restoration from interrupt servicing/exception processing is executed by the RETI instruction.
With the RETI instruction, the processor performs the following steps,and transfers control to the address of the
restore PC.
(1) If the EP bit of the PSW is 0 and the NP bit of the PSW is 1, the restore PC and PSW are read from the FEPC
and FEPSW. Otherwise, the restore PC and PSW are read from the EIPC and EIPSW.
(2) Control is transferred to the address of the restored PC and PSW.
When execution has returned from exception processing or non-maskable interrupt servicing, the NP and EP bits
of the PSW must be set to the following values by using the LDSR instruction immediately before the RETI instruction,
in order to restore the PC and PSW normally:
To restore from non-maskable interrupt ··················· NP = 1, EP = 0
To restore from exception processing······················· EP = 1
Figure 6-6 illustrates how restoration from interrupt/exception is performed.
Figure 6-6. Restoration from Interrupt/Exception
PSW.EP
PSW.NP
PC
PSW
EIPC
EIPSW
1
0
RETI Instruction
Jump to PC
PC
PSW
FEPC
FEPSW
1
0
Restoration
from
Exception
Restoration from
Non-Maskable
Interrupt
Restoration
from Maskable
Interrupt
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