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參數(shù)資料
| 型號： | ZXLD1100 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 222K |
| 代理商： | ZXLD1100 |
ZXLD1100
S E M IC O N D U C T O R S
ISSUE 2 - FEBRUARY 2004
3
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
IN
I
IN
Input voltage
2.5
5.5
V
Supply current
Quiescent
Shutdown
V
= V
, I
= 0,
Output not switching
V
EN
= 0V
60
100
500
A
nA
V
FB
I
FB
f
LX
FB pin control voltage
90.5
109.5
mV
FB pin input current
100
nA
Operating frequency
L=10 H, V
OUT
=10V,
I
OUT
=20mA
0.35
1
MHz
T
OFF
T
ON
I
LX pk
LX output 'OFF' time
LX output 'ON' time
(2)
350
500
ns
5
μs
Switch peak current limit
L=10 H, V
OUT
=10V,
I
OUT
=20mA
320
mA
R
LX
I
LX (leak)
V
OUT
Switch 'On' resistance
1.5
Switch leakage current
V
LX
=20V
Normal operation
VSENSE pin
open-circuit or
grounded
1
μA
Controller output voltage
28
V
V
OUT(MAX )
Controller output voltage with output
open circuit
VSENSE connected to
Vout
25
30
V
V
ENH
V
ENL
I
ENL
I
ENH
T
EN(hold)
EN pin High level Input voltage
Device active
1.5
V
IN
0.4
V
EN pin Low level Input voltage
Device in shutdown
V
EN pin Low level input current
V
EN
=0V
V
EN
=V
IN
V
switched from
high to low
-100
nA
EN pin High level input current
EN pin turn off delay
(4)
100
nA
80
120
μs
T/T
PWM duty cycle range at ‘EN’ input for
filtered PWM control
(5)
10kHz < f < 100kHz,
V
ENH
=V
IN
20
100
%
f
LPF
Internal PWM low pass filter cut-off
frequency
4
kHz
A
LPF
Filter attenuation
f=30kHz
52.5
dB
ELECTRICAL CHARACTERISTICS
(at T
amb
= 25°C unless otherwise stated
(1)
)
NOTES:
(1) Production testing of the device is performed at 25°C. Functional operation of the device over a -40°C to +85°C temperature range is
guaranteed by design, characterization and process control.
(2) Nominal 'on' time (T
) is defined by the input voltage (V
IN
), coil inductance (L) and peak current (I
LXpkdc
) according to the expression:
T
ONnom
= {I
LX(pkdc
) x L/V
IN
} +200ns.
(3) When using the open circuit protection feature, the maximum output voltage under normal operation should be maintained below the
minimum value specified, in order to prevent possible disturbance of the current control loop.
(4) This is the time for which the device remains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
maintained during dc PWM mode operation.
(5) The minimum PWM signal frequency during this mode of operation is to ensure that the device remains active during PWM control. This
provides a continuous dc output current. For lower frequencies, the device will be gated 'on' and 'off' during PWM control.
(6) The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimize errors due to the turn-off
delay of the device (see Enable pin turn-off delay).
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