參數(shù)資料
型號: ZPSD411A2
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個(gè)可編程I/O,通用PLD有59個(gè)輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,40余個(gè)可編程輸入/輸出,通用PLD的有59個(gè)輸入)
文件頁數(shù): 10/108頁
文件大小: 626K
代理商: ZPSD411A2
ZPSD4XX Famly
5-10
Pin Name
Pin Function
Type
Function Descriptions
PE0
Port PE, pin 0
1. BHE
2. PSEN
3. WRH
4. UDS
5. SIZ0
6. PE0
7. PE0
8. PE0
I/O
Multiple functions
1. High byte enable, 16 bit data
2. Read program memory, 8031 signal
3. Write high data byte
4. Upper Data Strobe
5. Byte enable, 68300 signal
6. I/O pin
7. ZPLD I/O pin
8. Latched Address Out – A0
PE1
Port PE, pin 1
1. ALE
2. PE1
3. PE1
4. PE1
I/O
Multiple functions
1. Address strobe
2. I/O pin
3. ZPLD I/O pin
4. Latched Address Out – A1
PE2
Port PE, pin 2
1. PE2
2. PE2
3. PE2
Multiple functions
1. I/O pin
2. ZPLD I/O pin
*
3. Latched Address Out – A2
I/O
PE3
Port PE, pin 3
1. PE3
2. PE3
3. PE3
Multiple functions
1. I/O pin
2. ZPLD I/O pin
*
3. Latched Address Out – A3
I/O
PE4
Port PE, pin 4
1. PE4
2. PE4
3. PE4
Multiple functions
1. I/O pin
2. ZPLD I/O pin
*
3. Latched Address Out – A4
I/O
PE5
Port PE, pin 5
1. PE5
2. PE5
3. PE5
Multiple functions
1. I/O pin
2. ZPLD I/O pin
*
3. Latched Address Out – A5
I/O
PE6
Port PE, pin 6
1. PE6
2. PE6
3. PE6
Multiple functions
1. I/O pin
2. ZPLD I/O pin
*
3. Latched Address Out – A6
I/O
PE7
Port PE, pin 7
1. APD CLK
2. PE7
3. PE7
4. PE7
Multiple functions
1. Automatic Power Down Clock Input
2. I/O pin
3. ZPLD I/O pin
*
4. Latched Address Out – A7
I/O
Vstdby
Vstdby
I
SRAM power pin for standby
operation (battery backup)
V
CC
V
CC
I
V
CC
power pin
GND
GND
I
Ground pin
*
Available only in ZPSD4XXA2 series.
Table 2.
ZPSD4XX Pin
Descriptions
(Cont.)
相關(guān)PDF資料
PDF描述
ZPSD413A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個(gè)可編程I/O,通用PLD有59個(gè)輸入)
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ZPSD512B1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入)
ZPSD512B1V Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入)
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