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| 型號： | ZN448D |
| 英文描述： | Converter IC |
| 中文描述： | 轉(zhuǎn)換器IC |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 289K |
| 代理商： | ZN448D |
ZN448/9
13
UNIPOLAR OPERATION
The general connection for unipolar operation is shown in
Fig.16.
The values of R
and R
are chosen so that V
IN
= V
REF IN
when
the analog input (A
IN
) is at full-scale.
The resulting full-scale range is given by:
A
IN
FS = 1 + R
REF IN
= G.V
REF IN
.
R
2
To match the ladder resistance R
1
/R
2
(R
IN
) = 4k.
The required nominal values of R
1
and R
2
are given by R
1
=
4Gk, R
2
= 4G k
G-1
Fig.16 General unipolar input connections
R1
R2
680k
1M
ZERO
ADJUST
GROUND
7
9
6
ZN448/9
VIN
AIN
VREF IN
Using these relationships a table of nominal values of R
1
and
R
2
can be constructed for V
REF IN
= 2.5V.
Gain adjustment
Due to tolerance in R
and R
, tolerance in V
and the gain
(full-scale) error of the DAC, some adjustment should be
incorporated into R
to calibrate the full-scale of the converter.
When used with the internal reference and 2% resistors a
preset capable of adjusting R
1
by at least
±
5% of its nominal
value is suggested.
R
2
8k
5.33k
R
1
8k
16k
G
2
4
Input range
+5V
+10V
Zero adjustment
Due to offsets in the DAC and comparator the zero (0 to 1)
code transition would occur with typically 15mV applied to the
comparator input, which correpsonds to 1.5LSB with a 2.56V
reference.
Zero adjustment must therefore be provided to set the zero
transition to its correct value of +0.5LSB or 5mV with a 2.56V
reference. This is achieved by applying an adjustable positive
offset to the comparator input via P2 and R3. The values
shown are suitable for all input ranges greater than 1.5 times
V
REF IN
.
Practical circuit values for +5 and +10V input ranges are given
in Fig.17, which incorporates both zero and gain adjustments.
1
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