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參數(shù)資料
| 型號(hào)： | Z80230 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | ESCC⑩ ENHANCED SERIAL COMMUNICATION CONTROLLER |
| 中文描述： | 食管⑩增強(qiáng)的串行通信控制器 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 103K |
| 代理商： | Z80230 |
10
AC CHARACTERISTICS
Z80230 General Timing Table
10 MHz
Min
16 MHz
Min
No
Symbol
Parameter
Max
Max
Notes*
1
2
3
4
TdPC(REQ)
TsPC(W)
TsRXC(PC)
TsRXD(RXCr)
/PCLK Low to W/REQ Valid
/PCLK Low to Wait Inactive
/RxC High to /PCLK High Setup Time
RxD to /RxC High Setup Time
200
300
110
180
NA
0
NA
0
[1,4]
[1]
5
6
7
8
ThRXD(RxCr)
TsRXD(RXCf)
ThRXD(RXCf)
TsSY(RXC)
RxD to /RxC High Hold Time
RxD to /RxC Low Setup Time
RxD to /RxC Low Hold Time
SYNC to /RxC High Setup Time
125
0
125
-150
60
0
60
-100
[1]
[1,5]
[1,5]
[1]
9
10
11
12
ThSY(RXC)
TsTXC(PC)
TdTXCf(TXD)
TdTxCr(TXD)
SYNC to /RxC High Hold Time
/TxC Low to /PCLK High Setup Time
/TxC Low to TxD Delay
/TxC High to TxD Delay
5TcPc
NA
5TcPc
NA
[1]
[2,4]
[2]
[2,5]
150
150
85
85
13
14
15
16a
TdTXD(TRX)
TwRTXh
TwRTXl
TcRTX
TxD to TRxC Delay
RTxC High Width
TRxC Low Width
RTxC Cycle Time
140
80
120
120
400
80
80
244
[6]
[6]
[6,7]
16b
17
18
19
TxRX(DPLL)
TcRTXX
TwTRXh
TwTRXl
DPLL Cycle Time Min
Crystal Osc. Period
TRxC High Width
TRxC Low Width
50
100
120
120
31
100
80
80
[7,8]
[3]
[6]
[6]
1000
1000
20
21
22
TcTRX
TwEXT
TwSY
TRxC Cycle Time
DCD or CTS Pulse Width
SYNC Pulse Width
400
120
120
244
70
70
[6,7]
Notes:
[1] RxC is /RTxC or /TRxC, whichever is supplying the receive clock.
[2] TxC is /TRxC or /RTxC, whichever is supplying the transmit clock.
[3] Both /RTxC and /SYNC have 30 pf capacitors to ground connected to them.
[4] Synchronization of RxC to PCLK is eliminated in divide by four operation.
[5] Parameter applies only to FM encoding/decoding.
[6] Parameter applies only for transmitter and receiver; DPLL and baud rate generator timing requirements are identical to case PCLK requirements.
[7] The maximum receive or transmit data rate is 1/4 PCLK.
[8] Applies to DPLL clock source only. Maximum data rate of 1/4 PCLK still applies. DPLL clock should have a 50% duty cycle.
* Units in nanoseconds (ns).
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