NAME
參數(shù)資料
型號: XRT91L34IV
廠商: Exar Corporation
文件頁數(shù): 2/38頁
文件大?。?/td> 0K
描述: IC MULTIRATE CDR QUAD 128LQFP
標準包裝: 72
類型: 時鐘和數(shù)據(jù)恢復(fù)(CDR),扇出緩沖器(分配),多路復(fù)用器
PLL:
主要目的: SONET/SDH,STS,STM
輸入: LVDS,LVPECL
輸出: LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 622.08MHz
電源電壓: 1.71 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x14)
包裝: 托盤
XRT91L34
10
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
REV. 1.0.1
POWER AND GROUND
NAME
TYPE
PIN
DESCRIPTION
AVDD1.8
PWR
42, 57, 58, 104, 105,
123
1.8V Analog Core Power Supply
AVDD1.8 should be isolated from DVDD1.8 and 3.3V VDD_IO
power supplies. For best results, use a ferrite bead along with an
internal power plane separation. The AVDD1.8 power supply pins
should have bypass capacitors to the nearest ground.
DVDD1.8
PWR
51, 112
1.8V Digital Core Power Supply
DVDD1.8 should be isolated from AVDD1.8 and 3.3V VDD_IO
power supplies. For best results, use an internal power plane
separation. The DVDD1.8 power supply pins should have bypass
capacitors to the nearest ground.
VDD_IO
PWR
5, 6, 13, 14, 19, 20, 27,
28, 65, 66, 73, 74, 87,
88, 95, 96
3.3V Input/Output Bus Power Supply
These pins require a 3.3V potential voltage for properly biasing
the Differential LVDS/Differential LVPECL and LVCMOS/LVTTL
input and output pins.
VDD_IO should be isolated from the AVDD1.8 and DVDD1.8
Core power supplies. For best results, use a ferrite bead along
with an internal power plane separation. The VDD_IO power sup-
ply pins should have bypass capacitors to the nearest ground.
GND_IO
GND
7, 8, 15, 16, 17, 18, 25,
26, 69, 70, 77, 78, 83,
84, 91, 92
Ground for 3.3V VDD Input/Output Power Supplies
It is recommended that all ground pins of this device be tied
together.
GND
43, 52, 61, 62, 100, 101,
110, 111, 121
Power Supply and Thermal Ground
It is recommended that all ground pins of this device be tied
together.
NC
1, 2, 9, 10, 23, 24, 31,
32, 97, 128
No Connect
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參數(shù)描述
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