參數資料
| 型號： | XRT75VL00IV-F |
| 廠商： | Exar Corporation |
| 文件頁數： | 49/50頁 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 1CH 52TQFP |
| 標準包裝： | 96 |
| 類型： | 線路接口裝置（LIU） |
| 驅動器/接收器數： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-LQFP |
| 供應商設備封裝： | 52-TQFP（10x10） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當前第49頁第50頁
XRT75VL00
6
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.6
RECEIVE INTERFACE
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
25
RxON/
SDI
I
Receiver Turn ON Input or Serial Data Input:
Function of this pin depends on whether the XRT75VL00 is configured to oper-
ate in Hardware mode or Host mode.
In Hardware mode, setting this input pin “High” turns on and enables the
Receiver..
NOTES:
1.
If the XRT75VL00 is configured in HOST mode, this pin functions as
SDI input pin (please refer to the pin description for Microprocessor
Interface)
2.
This pin is internally pulled down.
23
REQEN
I
Receive Equalization Enable Input
Setting this input pin "High" enables the Internal Receive Equalizer. Setting this
pin "Low" disables the Internal Receive Equalizer.
NOTES:
1.
This input pin is ignored and may be connected to GND if the
XRT75VL00 is operating in the HOST Mode
2.
This pin is internally pulled down.
36
RxClk
O
Receive Clock Output
The Recovered Clock signal from the incoming line signal is output through this
pin.By default, the Receiver Section outputs data via RPOS and RNEG pins on
the rising edge of this clock signal.
Configure the Receiver Section to update data on the RPOS and RNEG pins on
the falling edge of RxClk by doing the following:
a) Operating in Hardware mode, pull the RxClkINV pin to “High”.
b) Operating in Host mode, write a “1” to RxClkINV bit field within the Receive
Control Register.
24
RxClkINV/
CS
I
RxClk INVERT or Chip Select:
Function of this pin depends on whether the XRT75VL00 is configured to oper-
ate in Hardware mode or Host mode.
In Hardware mode, setting this input pin “High” configures the Receiver Sec-
tion
to invert the RxClk output signals and outputs the recovered data via
RPOS and RNEG on the falling edge of RxClk.
NOTE: If the XRT75VL00 is configured in HOST mode, this pin functions as CS
input pin (please refer to the pin description for Microprocessor
Interface).
38
RPOS
O
Receive Positive Data Output
This output pin pulses “High" whenever the XRT75VL00 has received a Positive
Polarity pulse in the incoming line signal at the RTIP/RRing inputs.
相關PDF資料 |
PDF描述 |
|---|---|
| XRT79L71IB-F | IC LIU/FRAMER DS3/E3 1CH 208BGA |
| XRT81L27IV-F | IC LIU EI 7CH 3.3V 128TQFP |
| XRT82D20IW-F | IC LIU E1 SGL 28SOJ |
| XRT82L24AIV-F | IC LIU E1 QAUD 100TQFP |
| XRT83D10IW | IC LIU T1/E1 SGL 28SOJ |
相關代理商/技術參數 |
參數描述 |
|---|---|
| XRT75VL00IVTR | 功能描述:時鐘合成器/抖動清除器 3.3V 1 CH E3/DS3/STS W/JITTER ATTEN RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75VL00IVTR-F | 功能描述:時鐘合成器/抖動清除器 3.3V 1 CH E3/DS3/STS W/JITTER ATTEN RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT79L71 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - |
| XRT79L71_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE |
| XRT79L71_1 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - |
發(fā)布緊急采購，3分鐘左右您將得到回復。