參數(shù)資料
型號(hào)： XRT75R03IV
廠商： Exar Corporation
文件頁(yè)數(shù)： 74/92頁(yè)
文件大?。?/td> 0K
描述： IC LIU E3/DS3/STS-1 3CH 128LQFP
標(biāo)準(zhǔn)包裝： 72
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 3/3
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 托盤(pán)
XRT75R03
xr
REV. 1.0.8
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
73
3
FL Alarm Declared
R/O
0
FL (FIFO Limit) Alarm Declared:
This READ-ONLY bit-field indicates whether or not the Jit-
ter Attenuator block (within Channel_n) is currently declar-
ing the FIFO Limit Alarm.
The Jitter Attenuator block will declare the FIFO Limit
Alarm anytime the Jitter Attenuator FIFO comes within two
bit-periods of either overflowing or under-running.
Conversely, the Jitter Attenuator block will clear the FIFO
Limit Alarm anytime the Jitter Attenuator FIFO is NO
longer within two bit-periods of either overflowing or under-
running.
Typically, this Alarm will only be declared whenever there
is a very serious problem with timing or jitter in the system.
0 - Indicates that the Jitter Attenuator block (within
Channel_n) is NOT currently declaring the FIFO Limit
Alarm condition.
1 - Indicates that the Jitter Attenuator block (within
Channel_n) is currently declaring the FIFO Limit Alarm
condition.
NOTE: This bit-field is only active if the Jitter Attenuator
(within Channel_n) has been enabled.
2
Receive LOL Con-
dition Declared
R/O
0
Receive LOL (Loss of Lock) Condition Declared:
This READ-ONLY bit-field indicates whether or not the
Receive Section (within Channel_n) is currently declaring
the LOL (Loss of Lock) condition.
The Receive Section (of Channel_n) will declare the LOL
Condition, if any one of the following conditions are met.
If the frequency of the Recovered Clock signal differs
from that of the signal provided to the E3CLK input (for
E3
applications),
the
DS3CLK
input
(for
DS3
applications)
or
the
STS-1CLK
input
(for
STS-1
applications) by 0.5% (or 5000ppm) or more.
If the frequency of the Recovered Clock signal differs
from the line-rate clock signal (for Channel_n) that has
been generated by the SFM Clock Synthesizer PLL (for
SFM Mode Operation) by 0.5% (or 5000ppm) or more.
0 - Indicates that the Receive Section of Channel_n is NOT
currently declaring the LOL Condition.
1 - Indicates that the Receive Section of Channel_n is cur-
rently declaring the LOL Condition.
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75R03IV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3-Ch E3/DS3/STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75R03IVTR 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75R03IVTR-F 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75R06 制造商:EXAR 制造商全稱:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R06D 制造商:EXAR 制造商全稱:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
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