- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376462 > XRT75R03IV (EXAR CORP) THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR PDF資料下載
參數(shù)資料
| 型號： | XRT75R03IV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP128 |
| 封裝： | 14 X 20 MM, LQFP-128 |
| 文件頁數(shù)： | 49/92頁 |
| 文件大小： | 492K |
| 代理商： | XRT75R03IV |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當(dāng)前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R03
REV. 1.0.7
46
Data/Clock Recovery Mode:
In the presence of input line signals on the RTIP_n and RRing_n input pins and when the frequency difference
between the recovered clock signal and the reference clock signal is less than 0.5%, the clock that is output on
the RxClk_n out pins is the Recovered Clock signal.
6.3
B3ZS/HDB3 Decoder:
The decoder block takes the output from clock and data recovery block and decodes the B3ZS (for DS3 or
STS-1) or HDB3 (for E3) encoded line signal and detects any coding errors or excessive zeros in the data
stream.
Whenever the input signal violates the B3ZS or HDB3 coding sequence for bipolar violation or contains three
(for B3ZS) or four (for HDB3) or more consecutive zeros, an active “High” pulse is generated on the RLCV_n
output pins to indicate line code violation.
N
OTE
:
In Dual- Rail mode, the decoder is bypassed.
6.4
LOS (Loss of Signal) Detector:
6.4.1
DS3/STS-1 LOS Condition:
A Digital Loss of SIgnal (DLOS) condition occurs when a string of 175 ± 75 consecutive zeros occur on the line.
When the DLOS condition occurs, the DLOS_n bit is set to “1” in the status control register. DLOS condition is
cleared when the detected average pulse density is greater than 33% for 175 ± 75 pulses.
Analog Loss of Signal (ALOS) condition occurs when the amplitude of the incoming line signal is below the
threshold as shown in the Table 10.The status of the ALOS condition is reflected in the ALOS_n status control
register.
RLOS is the logical OR of the DLOS and ALOS states. When the RLOS condition occurs the RLOS_n output
pin is toggled “High” and the RLOS_n bit is set to “1” in the status control register.
DISABLING ALOS/DLOS DETECTION:
For debugging purposes it is useful to disable the ALOS and/or DLOS detection. Writing a “1” to both
ALOSDIS_n and DLOSDIS_n bits disables the LOS detection on a per channel basis.
6.4.2
E3 LOS Condition:
If the level of incoming line signal drops below the threshold as described in the ITU-T G.775 standard, the
LOS condition is detected. Loss of signal level is defined to be between 15 and 35 dB below the normal level.
If the signal drops below 35 dB for 10 to 225 consecutive pulse periods, LOS condition is declared. This is
illustrated in Figure 19.
T
ABLE
10: T
HE
ALOS (A
NALOG
LOS) D
ECLARATION
AND
C
LEARANCE
T
HRESHOLDS
FOR
A
GIVEN
SETTING
OF
LOSTHR
AND
REQEN (DS3
AND
STS-1 A
PPLICATIONS
)
A
PPLICATION
REQEN S
ETTING
LOSTHR S
ETTING
S
IGNAL
L
EVEL
TO
D
ECLARE
ALOS
D
EFECT
S
IGNAL
L
EVEL
TO
C
LEAR
ALOS
D
EFECT
DS3
0
0
< 75mVpk
> 130mVpk
1
0
< 45mVpk
> 60mVpk
0
1
< 120mVpk
> 45mVpk
1
1
< 55mVpk
> 180mVpk
STS-1
0
0
< 120mVpk
> 170mVpk
1
0
< 50mVpk
> 75mVpk
0
1
< 125mVpk
> 205mVpk
1
1
< 55mVpk
> 90mVpk
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT75R06D | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75R06DIB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75R06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75R06IB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75R12D | TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75R03IV-F | 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch E3/DS3/STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75R03IVTR | 功能描述:時鐘合成器/抖動清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R03IVTR-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75R06D | 制造商:EXAR 制造商全稱:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。