參數(shù)資料
型號: XRT75L06IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PBGA217
封裝: 23 X 23 MM, BGA-217
文件頁數(shù): 27/63頁
文件大小: 360K
代理商: XRT75L06IB
XRT75L06
REV. 1.0.3
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
24
3.0
The transmitter is designed so that the LIU can accept serial data from a local device, encode the data
properly, and then output an analog pulse according to the pulse shape chosen in the appropriate registers.
This section describes the detailed operation of various blocks within the transmit path. A simplified block
diagram of the transmit path is shown in Figure 13.
THE TRANSMITTER SECTION
F
IGURE
13. T
RANSMIT
P
ATH
B
LOCK
D
IAGRAM
3.1
The method for applying data to the transmit inputs of the LIU is a serial interface consisting of TxClk, TxPOS,
and TxNEG. For single rail mode, only TxClk and TxPOS are necessary for providing the local data from a
Framer device or ASIC. Data can be sampled on either edge of the input clock signal by programming the
appropriate register. A typical interface is shown in Figure 14.
Transmit Digital Input Interface
F
IGURE
14. T
YPICAL
INTERFACE
BETWEEN
TERMINAL
EQUIPMENT
AND
THE
XRT75L06 (
DUAL
-
RAIL
DATA
)
Channel n
Device
Monitor
MTIP_n
MRing_n
DMO_n
Timing
Control
Tx
Pulse
Shaping
HDB3/
B3ZS
Encoder
Tx
Control
Jitter
Attenuator
MUX
Line
Driver
TxON
TxClk_n
TxPOS_n
TxNEG_n
TTIP_n
TRing_n
Terminal
Equipment
(E3/DS3 or STS-1
Framer)
Exar E3/DS3/STS-1 LIU
Transmit
Logic
Block
TxPOS
TxNEG
TxLineClk
TPData
TNData
TxClk
相關(guān)PDF資料
PDF描述
XRT75R03D THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
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XRT75R03 THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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