參數(shù)資料
型號: XRT75L04IV-F
廠商: Exar Corporation
文件頁數(shù): 7/57頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 4CH 176LQFP
標(biāo)準(zhǔn)包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 176-LQFP
供應(yīng)商設(shè)備封裝: 176-TQFP(24x24)
包裝: 托盤
XRT75L04
13
REV. 1.0.4
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
87
SDI
RxON
I
Serial Data Input:
Data is serially input through this pin.
The input data is sampled on the rising edge of the SClk pin (pin 88).
NOTES:
1.
This pin is internally pulled down
2.
If configured in Hardware Mode, this pin functions as RxON.
85
SDO
RxMON
I/O
Serial Data Output:
This pin serially outputs the contents of the specified Command Register during
Read Operations. The data is updated on the falling edge of the SClk and this
pin is tri-stated upon completion of data transfer.
NOTE: If configured in Hardware Mode, this pin functions as RxMON.
84
INT
LOSMUT
I/O
INTERRUPT Output:
This pin functions as Interrupt Output for Serial Interface. A transition to “Low”
indicates that an interrupt has been generated by the Serial Interface. The inter-
rupt function can be disabled by setting the interrupt enable bit to “0” in the
Channel Control Register.
NOTES:
1.
In Hardware mode, this pin functions as LOSMUT.
2.
This pin will remain asserted “Low” until the interrupt is serviced.
133
RESET
I
Register Reset:
Setting this input pin "Low" causes the XRT75L04 to reset the contents of the
Command Registers to their default settings and default operating configuration
NOTE: This pin is internally pulled up.
JITTER ATTENUATOR INTERFACE
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
154
JA1
I
Jitter Attenuator Select 1:
In Hardware Mode, this pin along with the pin JA0 configures the Jitter Attenua-
tor as shown in the table.
NOTE: This pin is internally pulled down.
SERIAL MICROPROCESSOR INTERFACE
JA0
0
Mode
16 bit FIFO
32 bit FIFO
JA1
0
1
Disable Jitter
Attenuator
0
1
Disable Jitter
Attenuator
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XRT75L06D 制造商:EXAR 制造商全稱:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
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