TABLE
參數(shù)資料
型號: XRT75L03IV
廠商: Exar Corporation
文件頁數(shù): 80/92頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP 裸露焊盤
供應商設備封裝: 128-LQFP(14x20)
包裝: 托盤
XRT75L03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.4
78
TABLE 28: RECEIVE CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X05
Channel 1 Address Location = 0x0D
Channel 2 Address Location = 0x15
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Unused
Disable DLOS
Detector
Disable ALOS
Detector
RxCLKINV
LOSMUT
Enable
Receive
Monitor Mode
Enable
Receive
Equalizer
Enable
R/O
R/W
0
0000
000
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
7 - 6
Unused
R/O
0
5
Disable DLOS
Detector
R/W
0
Disable Digital LOS Detector - Channel_n:
This READ/WRITE bit-field is used to either enable or dis-
able the Digital LOS (Loss of Signal) Detector within
Channel_n, as described below.
0 - Enables the Digital LOS Detector within Channel_n.
NOTE: This is the default condition.
1 - Disables the Digital LOS Detector within Channel_n.
NOTE: This bit-field is only active if Channel_n has been
configured to operate in the DS3 or STS-1 Modes.
4
Disable ALOS
Detector
R/W
0
Disable Analog LOS Detector - Channel_n:
This READ/WRITE bit-field is used to either enable or dis-
able the Analog LOS (Loss of Signal) Detector within
Channel_n, as described below.
0 - Enables the Analog LOS Detector within Channel_n.
NOTE: This is the default condition.
1 - Disables the Analog LOS Detector within Channel_n.
NOTE: This bit-field is only active if Channel_n has been
configured to operate in the DS3 or STS-1 Modes.
3
RxCLKINV
R/W
0
Receive Clock Invert Select - Channel_n:
This READ/WRITE bit-field is used to select the edge of
the RCLK_n output that the Receive Section of Channel_n
will use to output the recovered data via the RPOS_n and
RNEG_n output pins, as described below.
0 - Configures the Receive Section (within the correspond-
ing channel) to output the recovered data via the RPOS_n
and RNEG_n output pins upon the rising edge of RCLK_n.
1 - Configures the Receive Section (within the correspond-
ing channel) to output the recovered data via the RPOS_n
and RNEG_n output pins upon the falling edge of RCLK_n.
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相關代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L03IV-F 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03IVTR 功能描述:時鐘合成器/抖動清除器 3CH E3/DS3/STS1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03IVTR-F 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L04 制造商:EXAR 制造商全稱:EXAR 功能描述:FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L04D 制造商:EXAR 制造商全稱:EXAR 功能描述:FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER