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參數(shù)資料
型號: XRT75L02DIV-F
廠商: Exar Corporation
文件頁數(shù): 2/50頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 2CH 100TQFP
標(biāo)準(zhǔn)包裝: 90
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 2/2
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
xr
XRT75L02
REV. 1.0.3
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
8
CLOCK INTERFACE
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
66
E3CLK
I
E3 Clock Input (34.368 MHz ± 20 ppm):
If any of the channels is configured in E3 mode, a reference clock 34.368 MHz
is applied on this pin.
NOTE: In single frequency mode, this reference clock is not required.
63
DS3CLK
I
DS3 Clock Input (44.736 MHz ± 20 ppm):
If any of the channels is configured in DS3 mode, a reference clock 44.736
MHz. is applied on this pin.
NOTE: In single frequency mode, this reference clock is not required.
60
STS-1CLK/ 12M
I
STS-1 Clock Input (51.84 MHz ± 20 ppm):
If any of the channels is configured in STS-1 mode, a reference clock 51.84
MHz is applied on this pin..
In Single Frequency Mode, a reference clock of 12.288 MHz ± 20 ppm is con-
nected to this pin and the internal clock synthesizer generates the appropriate
clock frequencies based on the configuration of the channels in E3, DS3 or
STS-1.
99
SFM_EN
I
Single Frequency Mode Enable:
Tie this pin “High” to enable the Single Frequency Mode. A reference clock of
12.288 MHz ± 20 ppm is applied. This offers the flexibility of using a low cost
reference clock and configures the board for either E3 or DS3 or STS-1 without
the need to change any components on the board.
In the Single Frequency Mode (SFM) an output clock is provided for each chan-
nel if the CLKOUT_EN bit is set or CLKOUT_EN pin tied “High”.
Tie this pin “Low” if single frequency mode is not selected. In this case, the
appropriate reference clocks must be provided.
NOTE:
This pin is internally pulled down
80
46
CLKOUT_0
CLKOUT_1
O
Clock output for channel 0
Clock output for channel 1
Low jitter clock
is output for each channel based on the mode selection
(E3,DS3 or STS-1)
if the CLK_EN_n bit is set in the control register or
CLKOUT_EN pin is tied “High”.
This eliminates the need for a separate clock source for the framer.
NOTES:
1.
This clock output is only available in SFM mode.
2.
The maximum drive capability for the clockouts is 16 mA.
45
CLKOUT_EN
I
Clock Output Enable in Single Frequency Mode:
Tie this pin “High” to enable the output clocks via the CLKOUT pins.
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