參數(shù)資料
型號(hào): XRT75L00IV
廠商: Exar Corporation
文件頁(yè)數(shù): 38/50頁(yè)
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 SGL 52TQFP
標(biāo)準(zhǔn)包裝: 96
類(lèi)型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 52-LQFP
供應(yīng)商設(shè)備封裝: 52-TQFP(10x10)
包裝: 托盤(pán)
XRT75L00
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
41
0x04
R/W
D0
TxLEV
Writing a “1” to this bit disables the Transmit Build-out
circuit and writing a “0” enables the Transmit Build-out
circuit.
NOTE: See section 4.03 for detailed description.
0
D1
TxClkINV
Writing a “1” to this bit configures the transmitter to
sample the data on TPData/TNData input pins on the
rising edge of TxClk.
0
D2
TAOS
Setting this bit to “1” causes a continuous stream of
marks to be sent out at the TTIP and TRing pins.
0
D3
Reserved
This Bit Location is Not Used.
D4
INSPRBS
Writing a “1” to this bit causes the PRBS generator to
insert a single-bit error onto the transmit PRBS data
stream.
NOTE: PRBS Generator/Detector must be enabled
for this bit to have any effect.
0
D5
TxMON
When this bit is set to “1”, the driver monitor is con-
nected to its own transmit channel and monitors the
transmit driver. When a transmit failure is detected,
the DMO output will go high.
When this bit is “0”, MTIP and MRing can be con-
nected to other transmit channel for monitoring.
0
0x05
R/W
D0
REQEN
Setting this bit to “1” enables the Receive Equalizer .
NOTE: See section 2.01 for detailed description.
0
D1
RxMON
Writing a “1” to this bit configures the Receiver into
monitoring mode. In this mode, the Receiver can
monitor a signal at the RTIP/RRing pins that be atten-
uated up to 20dB flat loss.
0
D2
LOSMUT
Writing a “1” to this bit causes the RPOS/RNEG out-
puts to be grounded while the LOS condition is
declared.
NOTE: If this bit has ben set, it will remain set evan
after LOS condition is cleared.
0
D3
RxClkINV
Writing a “1” to this bit configures the Receiver to out-
put RPOS/RNEG data on the falling edge of RxClk.
0
D4
ALOSDIS
Writing a “1” to this bit disables the ALOS detector.
0
D5
DLOSDIS
Writing a “1” to this bit disables the DLOS detector.
0
TABLE 16: REGISTER MAP DESCRIPTION
ADDRESS
(HEX)
TYPE
BIT LOCATION
SYMBOL
DESCRIPTION
DEFAULT
VALUE(BIN)
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