參數(shù)資料
型號(hào): XRT75L00DIV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述: DATACOM, PCM TRANSCEIVER, PQFP52
封裝: 10 X 10 MM, TQFP-52
文件頁(yè)數(shù): 89/92頁(yè)
文件大?。?/td> 894K
代理商: XRT75L00DIV
XRT75L00D
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
84
that are responsible for acquiring and maintaining DS1 or DS3 frame synchronization (with these DS1 or DS3
data-streams that have been de-mapped from SONET) must have re-acquired DS1 or DS3 frame
synchronization within 50ms" after APS has been initiated."
The LIU was designed such that the DS3 signals that it receives from a SONET Mapper device and processes
will comply with the Category I Intrinsic Jitter requirements per Telcordia GR-253-CORE.
Reference 1 documents some APS Recovery Time testing, which was performed to verify that the Jitter
Attenuator blocks (within the LIU) device that permit it to comply with the Category I Intrinsic Jitter
Requirements (for DS3 Applications) per Telcordia GR-253-CORE, do not cause it to fail to comply with the
"APS Completion Time" requirements per Section 5.3.3.3 of Telcordia GR-253-CORE. However, Table 20
presents a summary of some APS Recovery Time requirements that were documented within this test report.
N
OTE
:
The APS Completion (or Recovery) time requirement is 50ms.
Configuring the LIU to be able to comply with the SONET APS Recovery Time Requirements of 50ms
Quite simply, the user can configure a given Jitter Attenuator block (associated with a given channel) to (1)
comply with the "APS Completion Time" requirements per Telcordia GR-253-CORE, and (2) also comply with
the "Category I Intrinsic Jitter Requirements per Telcordia GR-253-CORE (for DS3 applications) by making
sure that Bit 4 (SONET APS Recovery Time Disable Ch_n), within the Jitter Attenuator Control Register is set
to "0" as depicted below.
T
ABLE
20: M
EASURED
APS R
ECOVERY
T
IME
AS
A
FUNCTION
OF
DS3
PPM
OFFSET
DS3 PPM O
FFSET
(
PER
W&G ANT-20SE)
M
EASURED
APS R
ECOVERY
T
IME
(
PER
L
OGIC
A
NALYZER
)
-99 ppm
1.25ms
-40ppm
1.54ms
-30 ppm
1.34ms
-20 ppm
1.49ms
-10 ppm
1.30ms
0 ppm
1.89ms
+10 ppm
1.21ms
+20 ppm
1.64ms
+30 ppm
1.32ms
+40 ppm
1.25ms
+99 ppm
1.35ms
JITTER ATTENUATOR CONTROL REGISTER
Channel 0 Address Location = 0x07, Channel 1 Address Location = 0x0F, Channel 2 Address Location = 0x17
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Unused
SONET APS
Recovery
Time Disable
Ch_n
JA RESET
Ch_n
JA1 Ch_n
JA in Tx Path
Ch_n
JA0 Ch_n
R/O
R/O
R/O
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
1
1
相關(guān)PDF資料
PDF描述
XRT75L02 TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L02IV TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L03D THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04D FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04DIV FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L00DIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L00DIVTR 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00DIVTR-F 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00ES 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 1CH T3/E3/STS1 LIU+JA 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00IV 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3.3V 1 CH E3/DS3/STS W/JITTER ATTEN RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray