REV. 1.0.0 7 91 36 RxCLK_0 RXCLK_1 O Receive Clock Output - Channel 0: Receive Clock " />
參數(shù)資料
型號(hào)： XRT73L02MIV-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 46/46頁(yè)
文件大小： 0K
描述： IC LIU E3/DS3/STS-1 2CH 100TQFP
標(biāo)準(zhǔn)包裝： 90
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 2/2
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤
xr
XRT73L02M
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.0
7
91
36
RxCLK_0
RXCLK_1
O
Receive Clock Output - Channel 0:
Receive Clock Output - Channel 1:
By default, RPOS and RNEG data sampled on the rising edge RxCLK..
Set the RxCLKINV bit or tie RClkINV pin “High” to sample RPOS/RNEG data
on the falling edge of RxCLK
92
35
RPOS_0
RPOS_1
O
Receive Positive Data Output - Channel 0:
Receive Positive Data Output - Channel 1:
NOTE: If the B3ZS/HDB3 Decoder is enabled in Single-rail mode, then the zero
suppression patterns in the incoming line signal (such as: "00V", "000V", "B0V",
"B00V") is removed and replaced with ‘0’.
93
34
RNEG_0/LCV_0
RNEG_1/LCV_1
O
Receive Negative Data Output/Line Code Violation Indicator - Channel 0:
Receive Negative Data Output/Line Code Violation Indicator - Channel 1:
In Dual Rail mode, a negative pulse is output through RNEG.
Line Code Violation Indicator - Channel n:
If configured in Single Rail mode then Line Code Violation will be output.
8
18
RRING_0
RRING_1
I
Receive Ring Input - Channel 0:
Receive Ring Input - Channel 1:
These pins along with RTIP receive the bipolar line signal from the remote DS3/
E3/STS-1 Terminal.
9
17
RTIP_0
RTIP_1
I
Receive TIP Input - Channel 0:
Receive TIP Input - Channel 1:
These pins along with RRING receive the bipolar line signal from the Remote
DS3/E3/STS-1 Terminal.
29
RxClkINV/
CS
I
Hardware Mode: RxClk INVERT
Host Mode: Chip Select:
Function of this pin depends on whether the XRT73L02M is configured to oper-
ate in Hardware mode or Host mode.
In Hardware mode, setting this input pin “High” configures the Receiver Sec-
tion of all channels to invert the RxClk_n output signals and outputs the recov-
ered data via RPOS_n and RNEG_n on the falling edge of RxClk_n.
NOTE: If the XRT73L02M is configured in HOST mode, this pin functions as CS
input pin (please refer to the pin description for Microprocessor Interface).
RECEIVE INTERFACE
PIN
#
SIGNAL NAME
TYPE
DESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73L02MIVTR-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73L03 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT
XRT73L03A 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03AIV 制造商:Exar Corporation 功能描述:
XRT73L03B 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
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