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參數(shù)資料
| 型號(hào)： | XRT73L00A |
| 廠商： | Exar Corporation |
| 英文描述： | E3/DS3/STS-1 LINE INTERFACE UNIT |
| 中文描述： | E3/DS3/STS-1線路接口單元 |
| 文件頁(yè)數(shù)： | 40/53頁(yè) |
| 文件大小： | 604K |
| 代理商： | XRT73L00A |
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XRT73L00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.2.0
á
37
The manner that the LIU transmits Dual-Rail data to
the Receiving Terminal Equipment is described below
and illustrated in Figure 24. The XRT73L00 typically
updates the data on the RPOS and RNEG output
pins on the rising edge RCLK1 (or RCLK2).
RCLK1 (or RCLK2) is the Recovered Clock signal
from the incoming Received line signal. These clock
signals are typically 34.368 MHz for E3 applications,
44.736 MHz for DS3 applications and 51.84 MHz for
SONET STS-1 applications.
If the XRT73L00 received a positive-polarity pulse in
the incoming line signal via the RTIP and RRING in-
put pins, then the XRT73L00 pulses the RPOS output
pin “High”. If the XRT73L00 received a negative-po-
larity pulse in the incoming line signal via the RTIP
and RRING input pins, then the XRT73L00 pulses the
RNEG output pin “High”.
Inverting the RCLK1 or RCLK2 outputs
When using the XRT73L00, either of the RCLK1 or
RCLK2 signals can be inverted with respect to the de-
livery of the RPOS and RNEG output signals to the
Receiving Terminal Equipment. This feature may be
useful for those customers whose Receiving Terminal
Equipment logic design is such that the RPOS and
RNEG data must be sampled on the rising edge of
RCLK1 or RCLK2. Figure 25 illustrates the behavior
of the RPOS, RNEG and RCLK signals when the
RCLK signal has been inverted.
F
IGURE
23. T
HE
T
YPICAL
I
NTERFACE
FOR
THE
T
RANSMISSION
OF
D
ATA
IN
A
D
UAL
-R
AIL
F
ORMAT
F
ROM
THE
R
ECEIVE
S
ECTION
OF
THE
XRT73L00
TO
THE
R
ECEIVING
T
ERMINAL
E
QUIPMENT
Exar E3/DS3/STS-1 LIU
Receive
Logic
Block
RxPOS
RxNEG
RCLK1, 2
RPOS
RNEG
RCLK1, 2
Terminal
Equipment
(E3/DS3 or STS-1
Framer)
F
IGURE
24. H
OW
THE
XRT73L00 O
UTPUTS
D
ATA
ON
THE
RPOS
AND
RNEG O
UTPUT
P
INS
RCLK1
RPOS
RNEG
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| XRT75L00 | E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75L00IV | E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L00AES | 功能描述:界面開(kāi)發(fā)工具 Eval System for XRT73L00A Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| XRT73L00AIV | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00IV | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:LINE INTERFACE|QFP|44PIN|PLASTIC |
| XRT73L02M | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L02MES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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