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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
70
NOTE: Refer to
2.3.3.10
Receive E3 GC Byte Register (E3, ITU-T G.832)
This Read-Only register contains the value of the GC byte, residing in the most recently received E3 frame.
NOTE: Refer to
2.3.3.11
Receive E3 TTB-0 Register (E3, ITU-T G.832)
This Read-Only register contains the frame start marker byte of the 16 byte Trail Trace Buffer Message that has
been received from the Remote Terminal, via the TR byte-field within the incoming E3 frames. The remaining
bytes, of this Trail Trace Buffer Message can be found in the RxTTB-1 through RxTTB-15 registers.
The data in this register is typically of the form [1, C6, C5, C4, C3, C2, C1, C0]. The "1" in the MSB position
identifies this byte as being the frame start marker (e.g., the first byte within the 16 byte Trail Trace Buffer
Message). The remaining bits: C0 - C6 contain the CRC-7 value that was calculated over the previous 16 byte
Trail Trace Buffer Message.
NOTES:
1.
The XRT72L50 Framer will not compute or verify this CRC-7 value. It is up to the user's hardware and/or software
to compute and verify this value.
2.
For more information on the use of this register, refer to
2.3.3.12
Receive E3 TTB-1 Register (E3, ITU-T G.832)
This Read-Only register contains the second (2nd) byte within the 16 byte Trail Trace Buffer Message, that has
been received from the Remote Terminal. This register typical contains an ASCII character that is required for
the E.164 numbering format.
NOTE: For more information on the use of this register, refer to
RxE3 GC Byte Register (Address = 0x1B)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
RxGC[7:0]
RO
0
0000
000
RxE3 TTB-0 Register (Address = 0x1C)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
RxTTB-0
RO
0
0000
000
RxE3 TTB-1 Register (Address = 0x1D)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
RxTTB-1
RO
0
0000
000