參數(shù)資料
型號: XRT7295ATIW-F
廠商: Exar Corporation
文件頁數(shù): 16/18頁
文件大?。?/td> 0K
描述: IC LINE RCVR 20SOJ
標準包裝: 36
類型: 接收器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: DS3,STS-1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 20-BSOJ
供應(yīng)商設(shè)備封裝: 20-SOJ
包裝: 管件
其它名稱: 1016-1356-5
XRT7295AT
7
Rev.1.20
DS3 SIGNAL REQUIREMENTS AT THE DSX
Pulse characteristics are specified at the DSX-3, which is
an interconnection and test point referred to as the
cross-connect (see Figure 2.) The cross-connect exists
at the point where the transmitted signal reaches the
distribution frame jack. Table 1 lists the signal
requirements. Currently, two isolated pulse template
requirements exist: the ACCUNET T45 pulse template
(see Table 2 and Figure 4)and the G.703 pulse template
(see Table 3 and Figure 5). Table 2 and Table 3 give the
associated boundary equations for the templates. The
XRT7295AT correctly decodes any transmitted signal
that meets one of these templates at the cross-connect.
Parameter
Specification
Line Rate
44.736 Mbps 20 ppm
Line Code
Bipolar with three-0 substitution (B3ZS)
Test Load
75 W 5%
Pulse Shape
An isolated pulse must fit the template in NO TAG or Figure 5.1 The pulse amplitude may be scaled by
a constant factor to fit the template. The pulse amplitude must be between 0.36vpk and 0.85vpk,
measured at the center of the pulse.
Power Levels
For and all 1s transmitted pattern, the power at 22.368 ± 0.002MHz must be -1.8 to +5.7dBm, and
the power at 44.736 ±0.002MHz must be -21.8dBm to -14.3dBm.2, 3
Notes
1 The pulse template proposed by G.703 standards is shown in Figure 5 and specified in Table 3. The proposed G.703 standards
further state that the voltage in a time slot containing a 0 must not exceed ± 5% of the peak pulse amplitude, except for the residue
of preceding pulses.
2 The power levels specified by the proposed G.703 standards are identical except that the power is to be measured in 3kHz bands.
3 The all 1s pattern must be a pure all 1s signal, without framing or other control bits.
Table 1. DSX-3 Interconnection Specification
Lower Curve
Upper Curve
Time
Equation
Time
Equation
T ± -0.36
0
T±-0.68
0
-0.36 ± T ± +0.28
0.5 (1+sin {p/2}[1+T/0.18])
-0.68 ± T± +0.36
0.5 (1+sin {p/2} [1+T/0.34])
0.28 ± T
0.11e-3.42(T-0.3)
0.36 ± T
0.05 + 0.407e-1.84(T-0.36)
Table 2. DSX-3 Pulse Template Boundaries for ACCUNET T45 Standards (See Figure 4.)
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XRT7295ATIW-F 制造商:Exar Corporation 功能描述:T3/E3 LIU IC
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